EP3SE110F1152I4 vs EP3SE110F1152I3N 比較
詳細並排比較 EP3SE110F1152I4 由 Intel 與 EP3SE110F1152I3N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Altera
EP3SE110F1152I3N - Stratix III E FPGA, 107K LE, 1152-FCBGA | Altera
EP3SE110F1152I3N ⚠ 最後購買機會規格比較
| 參數 | EP3SE110F1152I4 | EP3SE110F1152I3N |
|---|---|---|
| 品牌 | Intel | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | 最後購買 |
| Family | Stratix III E | Stratix III E FPGA |
| Logic Elements (LE) | 107,500 | 107,500 |
| Logic Array Blocks (LABs) | 4300 | 4300 |
| DSP Blocks | 744 | — |
| Embedded Memory (bits) | 8,936,448 | — |
| User I/Os | 744 | — |
| 封裝 | 1152-ball FCBGA (Flip-Chip BGA) | 1152-ball FC-FBGA (Flip-Chip Fine-pitch BGA) |
| 工作溫度 | -40°C to +100°C (Industrial) | — |
| Process Node | 40 nm | — |
| Maximum User I/O Speed | [DATA_NEEDED: maximum I/O toggle rate MHz] | — |
| PLLs | 24 | — |
| Configuration Modes | JTAG, Passive Serial (PS), Fast Passive Parallel (FPP), Active Serial (AS) | — |
| Memory Interface Support | DDR3, DDR2, QDRII+, RLDRAM II | — |
| Transceiver Protocol Support | PCIe Gen1/Gen2, Gbit Ethernet, XAUI, Serial RapidIO | — |
| RoHS 狀態 | Compliant | — |
| Lead-Free | Yes | — |
| 安裝類型 | Surface Mount (BGA) | Surface Mount |
| MSL 等級 | [DATA_NEEDED: MSL rating] | — |
| Series | — | Stratix III E |
| Manufacturer | — | Altera (now Intel PSG) |
| Total RAM Bits | — | 8,936,448 |
| Maximum User I/Os | — | 744 |
| Number of I/O Banks | — | Modular I/O banks (see Stratix III Device Handbook) |
| Core Voltage | — | 1.1 V |
| Process Technology | — | 65 nm CMOS |
| 工作溫度範圍 | — | -40C to +100C (industrial, I3 grade) |
| Speed Grade | — | -3 (I3 fast grade, industrial) |
| Lead-Free / RoHS | — | Lead-free (N suffix); RoHS compliance status: see Stratix III Device Handbook |
| Configuration | — | JTAG via Quartus II; supports AS, PS, JTAG, FPP modes |
| Internal Supply Voltage (Max) | — | 0.94 V (per Partstack listing) |