EP3SL340F1517C3N vs EP3SL340F1517C3 比較

詳細並排比較 EP3SL340F1517C3N 由 Altera 與 EP3SL340F1517C3 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EP3SL340F1517C3N EP3SL340F1517C3
品牌 Altera Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 NRND 啟用中
Family Stratix III L —
Logic Elements 337,500 —
Logic Array Blocks (LABs) 13,500 —
Embedded Memory Bits 18,822,144 bits (18.8 Mbit) —
Maximum User I/O Pins 976 —
Process Technology 65 nm CMOS, low-power 65 nm
Core Voltage (VCCINT) 1.1 V —
Maximum Core Frequency 500 MHz —
Speed Grade -3 (fastest commercial) —
封裝 1517-ball FC-BGA 1517-BBGA, FCBGA
Package Code F1517 —
工作溫度 0 C to 85 C (commercial) [DATA_NEEDED: operating temperature range]
RoHS 狀態 Compliant (lead-free ball metallurgy, N suffix) [DATA_NEEDED: RoHS status]
安裝類型 Surface Mount (FC-BGA) —
MSL 等級 [DATA_NEEDED: MSL level] —
DSP Blocks [DATA_NEEDED: exact DSP block count] —
Transceivers [DATA_NEEDED: transceiver count for this package] —
PLLs [DATA_NEEDED: PLL count] —
Device Type — Field Programmable Gate Array (FPGA)
Series — Stratix III L
Logic Cells — 337,500
Logic Elements/Cells — 337,500
LABs — 13,500
User I/O — 976
Memory Bits — 18,822,144 bits
Maximum Reported Frequency — 500 MHz
Core Voltage — 1.1 V
Terminal Count — 1517 pins
Package Shape — Square
Terminal Form — Ball
AEC-Q100 Qualification — [DATA_NEEDED: AEC-Q100 qualification]

資料表與資源

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