EP3SL340F1760C4 vs EP3SL340F1760I3N 比較
詳細並排比較 EP3SL340F1760C4 由 Intel 與 EP3SL340F1760I3N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP3SL340F1760C4 | EP3SL340F1760I3N |
|---|---|---|
| 品牌 | Intel | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 最後購買 | NRND |
| Series | Stratix III L | — |
| Logic Elements | 337,500 | 337,500 |
| Embedded Memory Bits | 18,821,144 | 18,821,144 bits |
| User I/O Count | 1,120 | — |
| 封裝 | 1760-BBGA, FCBGA (Flip-Chip) | 1760-ball FC-FBGA (Flip-Chip BGA) |
| Process Node | 65 nm | — |
| Core Voltage | 1.1 V | 1.1 V |
| Maximum Core Frequency | 450 MHz | — |
| Speed Grade | C4 (commercial) | I3 |
| 工作溫度 | 0C to +85C (commercial) | -40C to +100C (Industrial) |
| I/O Standards Supported | LVDS, LVTTL, LVCMOS, HSTL, SSTL, PCI, PCI-X | — |
| Transceivers | [DATA_NEEDED: number of embedded transceiver channels] | — |
| DSP Blocks | [DATA_NEEDED: DSP block count] | — |
| PLLs | [DATA_NEEDED: PLL count] | — |
| Configuration Scheme | Passive serial, fast passive parallel, JTAG | — |
| RoHS 狀態 | Compliant | Compliant |
| Lead-Free | Yes | Yes |
| 安裝類型 | Surface Mount (BGA) | — |
| Family | — | Stratix III L |
| Logic Array Blocks (LABs) | — | 13,500 |
| Maximum User I/O | — | 1120 |
| Process Technology | — | 65 nm CMOS |
| Ball Pitch | — | 1.0 mm |
| Configuration Method | — | JTAG / Serial / Parallel |
| Design Software | — | Quartus II (legacy) |