EP3SL50F780C4N vs EP3SL50F780I3N 比較
詳細並排比較 EP3SL50F780C4N 由 Intel 與 EP3SL50F780I3N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP3SL50F780C4N | EP3SL50F780I3N |
|---|---|---|
| 品牌 | Intel | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | 最後購買 |
| Family | Stratix III L | — |
| Series | EP3SL50 | Stratix III L |
| Logic Elements (LEs) | 47,500 | — |
| Number of LABs / CLBs | 1,900 | — |
| Total RAM Bits | 2,184,192 (273 KB) | — |
| Number of User I/Os | 488 | — |
| Number of GPIO | 488 | — |
| 封裝 | 780-BBGA, FCBGA (FBGA-780) | 780-ball FC-FBGA (Flip-Chip BGA) |
| Process Technology | 65 nm CMOS | 65 nm CMOS |
| Speed Grade | -4 | -3 |
| 工作溫度 | 0C to +85C (commercial) | -40C to +100C (industrial) |
| Core Voltage Range | 0.86 V to 1.15 V | — |
| 安裝類型 | Surface Mount | Surface Mount |
| Lead Free / RoHS | Lead free, RoHS compliant per distributor listing | — |
| Maximum Operating Frequency | 717 MHz (per family) | — |
| DSP Blocks | Hard DSP blocks (Stratix III family) | — |
| Memory Interface Support | DDR, DDR2, DDR3 (family feature) | — |
| Manufacturer | — | Altera (Intel Programmable Solutions Group) |
| Logic Elements | — | 47,500 |
| Number of LABs | — | 1,900 |
| Embedded Memory Bits | — | 2,184,192 bits |
| Maximum User I/O | — | 488 |
| Operating Frequency (max) | — | 500 MHz |
| Core Supply Voltage | — | 1.1 V |
| JTAG Support | — | IEEE Std 1149.1 Boundary-Scan |
| RoHS 狀態 | — | Compliant (LEAD FREE) |
| Configuration Method | — | JTAG / Serial / Passive / Active |