EP3SL50F780I3 vs EP3SL50F780I3N 比較

詳細並排比較 EP3SL50F780I3 由 Intel 與 EP3SL50F780I3N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

Altera
EP3SL50F780I3N EP3SL50F780I3N - Stratix III L FPGA, 47.5K LE, FBGA-780 | Intel

EP3SL50F780I3N - Stratix III L FPGA, 47.5K LE, FBGA-780 | Intel

EP3SL50F780I3N ⚠ 最後購買機會

規格比較

參數 EP3SL50F780I3 EP3SL50F780I3N
品牌 Intel Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 NRND 最後購買
Series Stratix III L Stratix III L
Logic Elements 47,500 47,500
Logic Array Blocks (LABs) 1,900 —
User I/O Pins 488 —
Total Memory Bits 2,106 Kbit (M9K + M144K) —
Transceiver Channels 16 (up to 3.75 Gbps) + 8 (up to 6.5 Gbps) —
封裝 780-ball FC-FBGA (FineLine BGA), 1 mm pitch 780-ball FC-FBGA (Flip-Chip BGA)
Process Technology 65 nm 65 nm CMOS
Core Voltage Selectable 1.1 V / 0.9 V —
Speed Grade I3 (industrial, third-fastest bin) -3
工作溫度 -40C to +100C (industrial) -40C to +100C (industrial)
安裝類型 Surface Mount Surface Mount
RoHS 狀態 Compliant Compliant (LEAD FREE)
Lead Free Yes —
Vertical Migration Drop-in to EP3SL70 in 780-FBGA package —
Manufacturer — Altera (Intel Programmable Solutions Group)
Number of LABs — 1,900
Embedded Memory Bits — 2,184,192 bits
Maximum User I/O — 488
Operating Frequency (max) — 500 MHz
Core Supply Voltage — 1.1 V
JTAG Support — IEEE Std 1149.1 Boundary-Scan
Configuration Method — JTAG / Serial / Passive / Active

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