EP610LI-30 vs EP610JI-30 比較

詳細並排比較 EP610LI-30 由 Rochester Electronics 與 EP610JI-30 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

Rochester Electronics
EP610LI-30 EP610LI-30 - 16-Macrocell Classic EPLD, 30ns | Rochester

EP610LI-30 - 16-Macrocell Classic EPLD, 30ns | Rochester

EP610LI-30 ✓ 啟用中

規格比較

參數 EP610LI-30 EP610JI-30
品牌 Rochester Electronics Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 啟用中 NRND
Product Type EPLD (Erasable Programmable Logic Device) —
Family Classic EPLD (MAX architecture) Altera Classic EPLD (EP610)
Macrocells 16 16
Pin-to-Pin Delay (tPD) 30 ns —
Maximum Internal Frequency (fMAX) 100 MHz (pipelined) —
AND Array 24V16 —
Process Technology CMOS, UV-erasable EPROM cells CMOS
Supply Voltage (VCC) 5 V (TTL-compatible I/O) —
封裝 24-pin Ceramic DIP (windowed, CDIP) CQCC28 (windowed ceramic JLCC, J-bend)
工作溫度 -55C to +125C (military/extended) -40C to +85C (industrial, per EP610 family suffix convention)
Output Polarity User-configurable per macrocell —
Flip-Flop per Cell D / T / J-K configurable —
Programming Method UV erase + Classic-series PLD programmer —
RoHS 狀態 unknown [DATA_NEEDED: RoHS status - vintage ceramic package, likely non-RoHS]
Manufacturer Rochester Electronics (originally Altera) —
Device Type — UV Erasable Programmable Logic Device (EPLD)
Propagation Delay (tpd) — 30 ns (max)
Pipelined Data Rate — Up to 100 MHz
Product Terms — 160
Dedicated Inputs — 4
I/O Pins — 16
External Clocks — 2
供應電壓 — 5 V (single supply)
Package Code — JLCC-28 / CQCC28
Erasure Method — Ultraviolet (UV) via top window
Programming — Altera Logic Programmer compatible
安裝類型 — Surface Mount (JLCC)
Lead-Free — [DATA_NEEDED: lead-free status]

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