EP610PC30 vs EP610LI-30 比較
詳細並排比較 EP610PC30 由 Altera 與 EP610LI-30 由 Rochester Electronics. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP610PC30 | EP610LI-30 |
|---|---|---|
| 品牌 | Altera | Rochester Electronics |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | NRND | 啟用中 |
| Device Type | EPLD (Erasable Programmable Logic Device) | — |
| Family | Classic EP610 | Classic EPLD (MAX architecture) |
| Macrocells | 16 | 16 |
| Usable Gates | 300 | — |
| Propagation Delay (tPD) | 30 ns | — |
| Maximum Toggle Frequency | 33.3 MHz | — |
| Pipelined Data Rate | Up to 100 MHz | — |
| Supply Voltage (VCC) | 5 V | 5 V (TTL-compatible I/O) |
| Technology | CMOS | — |
| 封裝 | PDIP-24 | 24-pin Ceramic DIP (windowed, CDIP) |
| 安裝類型 | Through-Hole | — |
| Programming | EPROM/EEPROM-based, MAX+plus II toolchain | — |
| 工作溫度 | [DATA_NEEDED: operating temperature range] | -55C to +125C (military/extended) |
| RoHS 狀態 | Not applicable (legacy through-hole, contains Pb per historical datasheet) | unknown |
| Logic Capacity | 16 macrocells / 300 gates equivalent | — |
| Configuration Memory | Non-volatile (UV-erasable or OTP variant) | — |
| Manufacturer (Original) | Altera Corporation (now Intel FPGA) | — |
| Current Distributor | Rochester Electronics, LLC | — |
| Product Type | — | EPLD (Erasable Programmable Logic Device) |
| Pin-to-Pin Delay (tPD) | — | 30 ns |
| Maximum Internal Frequency (fMAX) | — | 100 MHz (pipelined) |
| AND Array | — | 24V16 |
| Process Technology | — | CMOS, UV-erasable EPROM cells |
| Output Polarity | — | User-configurable per macrocell |
| Flip-Flop per Cell | — | D / T / J-K configurable |
| Programming Method | — | UV erase + Classic-series PLD programmer |
| Manufacturer | — | Rochester Electronics (originally Altera) |