EP610PI-30 vs EP610PI-25 比較
詳細並排比較 EP610PI-30 由 Rochester Electronics 與 EP610PI-25 由 Rochester Electronics. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Rochester Electronics
EP610PI-25 - 16-Macrocell Classic EPLD, 25ns DIP-24 | Rochester
EP610PI-25 Obsolete規格比較
| 參數 | EP610PI-30 | EP610PI-25 |
|---|---|---|
| 品牌 | Rochester Electronics | Rochester Electronics |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 最後購買 | Obsolete |
| Family | EP610 Classic EPLD | — |
| Logic Elements / Macrocells | 16 macrocells | — |
| Usable Gates | 300 gates | ~300 gates |
| Propagation Delay (tPD) | 30 ns (PI-30 speed grade) | 25 ns |
| Maximum Frequency (pipelined) | 100 MHz | — |
| Process Technology | CMOS EEPROM | CMOS, UV-erasable |
| Supply Voltage (VCC) | 5 V | 5 V nominal |
| 腳位數 | 24 | — |
| 封裝 | PDIP-24 (Plastic DIP) | 24-pin DIP (PI) ceramic through-hole |
| Number of Global Clocks | 2 | — |
| Number of Dedicated Inputs | 4 | 4 |
| Number of I/O Pins | 10 | — |
| Programming Technology | EEPROM (in-system, 100+ cycles) | — |
| 工作溫度 | [DATA_NEEDED: operating temperature range] | — |
| RoHS 狀態 | Not Compliant (per distributor data) | — |
| ECCN | EAR99 | — |
| HTS Code | 8542.39.00.01 | — |
| Product Type | — | Erasable Programmable Logic Device (EPLD) |
| Series | — | Classic EP610 |
| Macrocells | — | 16 |
| Maximum Internal Frequency (fCNT) | — | [DATA_NEEDED: fCNT] |
| Number of Bidirectional I/O Pins | — | 16 |
| 工作溫度範圍 | — | Industrial (I suffix): -40C to +85C |
| Programmable Flip-Flop Modes | — | D, T, JK, SR (per macrocell) |
| Global Clock Pins | — | 1 |
| 安裝類型 | — | Through-Hole (DIP) |
| Lead-Free / RoHS | — | [DATA_NEEDED: RoHS] |
| Original Manufacturer | — | Altera (now Intel PSG; legacy stock from Rochester Electronics) |