EP910LI-15 vs EP910LI-20 比較
詳細並排比較 EP910LI-15 由 Altera 與 EP910LI-20 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP910LI-15 | EP910LI-20 |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | Obsolete |
| Product Type | Programmable Logic Device (PLD) | — |
| Device Family | Altera Classic EPLD | — |
| Part Number | EP910LI-15 | — |
| Supply Voltage Range | 4.5 V to 5.5 V | — |
| Dedicated Inputs | 12 | 16 |
| Input/Output Lines | 24 | — |
| Total User-Signal Resources | 36 | — |
| Speed Grade | 15 ns | — |
| 工作溫度範圍 | -40 °C to +85 °C | — |
| Technology | CMOS | CMOS, UV-erasable |
| 封裝 | 44-terminal J-lead ceramic chip carrier (PQCC44) | 40-pin Ceramic DIP (Windowed) |
| Package Pin Count | 44 terminals | — |
| Package Mounting | Surface Mount | — |
| Dielectric/Construction | Ceramic | — |
| RoHS 狀態 | unknown | [DATA_NEEDED: RoHS status] |
| REACH Status | unknown | — |
| AEC-Q100 Status | not_applicable | — |
| Lead-Free Status | unknown | — |
| Halogen-Free Status | unknown | — |
| Conflict Minerals Status | unknown | — |
| Family | — | Altera Classic EPLD |
| Macrocells | — | 24 |
| Maximum Operating Frequency | — | 62 MHz |
| Propagation Delay (tpd) | — | 20 ns |
| I/O Pins | — | 24 |
| Supply Voltage (VCC) | — | 5 V |
| 工作溫度 | — | -40C to +85C (Industrial) |
| Package Type | — | Through-Hole, Ceramic DIP with Quartz Window |
| Temperature Grade | — | Industrial (-40C to +85C) |
| 腳位數 | — | 40 |
| Logic Family | — | EPLD (Erasable PLD) |
| Architecture | — | Sum-of-products macrocell |
| Pin/Package Compatibility | — | Pin-compatible across EP910 family |