EP910PC-15 vs EP910IDC-15 比較
詳細並排比較 EP910PC-15 由 Altera 與 EP910IDC-15 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP910PC-15 | EP910IDC-15 |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | Altera Classic EPLD | Classic EPLD |
| Usable Gates | 900 | — |
| Macrocells | 24 | 24 |
| Maximum Pin-to-Pin Delay (tpd) | 15 ns | — |
| Counter Frequency (fCNT) | 100 MHz | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V (5 V nominal) | 5 V |
| Supply Current (Icc) | 80 mA typical | — |
| Dedicated Inputs | 10 | 10 |
| Dedicated I/O Pins | 12 | — |
| 工作溫度 | 0C to +70C (commercial) | — |
| 封裝 | 24-pin PDIP (PDIP-24, 0.300 inch) | 40-pin CDIP (Ceramic DIP, through-hole) |
| 安裝類型 | Through-Hole | — |
| Process Technology | CMOS, UV-erasable | — |
| Programming Method | Altera Logic Programmer card | — |
| RoHS 狀態 | [DATA_NEEDED: RoHS status - EP910 is a legacy through-hole part, likely non-RoHS] | non_compliant (ceramic DIP contains lead) |
| MSL 等級 | Not applicable (through-hole) | — |
| Manufacturer | — | Altera (now Intel PSG) |
| Equivalent Gates | — | 450 |
| Flip-Flops | — | 48 |
| Pin-to-Pin Delay (tPD) | — | 15 ns |
| Maximum Frequency (fCNT) | — | 66.6 MHz |
| Terminal Count | — | 40 |
| Terminal Form | — | Through-Hole |
| Temperature Grade | — | Commercial (0C to +70C) |
| Programmable Security Bit | — | Yes |
| On-board Test Circuitry | — | Yes |
| Logic Type | — | UV Erasable EPROM-based |
| I/O Pins | — | 24 |
| Programming Technology | — | EPROM (UV-erasable) |