EPC1064LC20 vs EPC1441LC20N 比較

詳細並排比較 EPC1064LC20 由 Intel 與 EPC1441LC20N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EPC1064LC20 EPC1441LC20N
品牌 Intel Intel
類別 Memory ICs Memory ICs
生命週期狀態 Obsolete Obsolete
記憶體容量 65 kb (65,536 bits) 440 Kbit
記憶體類型 OTP Configuration PROM (Flash-based, one-time programmable) OTP EPROM (One-Time Programmable)
Programmable Type OTP (One-Time Programmable) —
介面 Serial (Passive Serial / daisy-chain compatible) Serial, 4-wire (nCS, DCLK, DATA, nINIT_CONF)
Access Time 90 ns (approximately 10 MHz) —
Supply Voltage (Operating) 4.5 V to 5.5 V —
Supply Voltage (Nominal) 5 V —
工作溫度 0 C to 70 C (Commercial) 0 C to +70 C (commercial)
封裝 / 外殼 20-PLCC (LC) J-lead, 9x9 mm —
No. of Terminals 20 —
Terminal Finish Tin/Lead (Sn/Pb) —
Package Code QCCJ (PLCC-20 J-lead) —
Package Shape Square —
Compatible Altera FPGA Families ACEX 1K, APEX 20K, APEX II, FLEX 10K, FLEX 6000, Mercury, Stratix, Stratix GX, Stratix II, Stratix II GX —
Configuration Modes Supported Passive Serial (PS) with FPP up to 100 MHz on newer FPGAs —
RoHS 狀態 Non-compliant (Sn/Pb finish) [DATA_NEEDED: RoHS status]
MSL 等級 [DATA_NEEDED: MSL level] [DATA_NEEDED: MSL level]
Lead-Free No (Sn/Pb terminal finish) [DATA_NEEDED: lead-free status]
組織 — 55 K x 8 bit
Configuration Clock (DCLK) — 8 MHz maximum
Programming Interface — JTAG (IEEE 1149.1) / Altera Programming Unit
供應電壓 — 3.3 V (typical)
封裝 — 20-PLCC (J-Lead, 9 x 9 mm)
Supported FPGA Families — ACEX 1K, APEX 20K, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, Mercury, Stratix, Stratix GX, Stratix II, Stratix II GX
Cascadable — Yes (nCS daisy-chain)
安裝類型 — Surface Mount (PLCC socket compatible)

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