EPC1213PC8 vs EPC1064VPC8 比較
詳細並排比較 EPC1213PC8 由 Altera 與 EPC1064VPC8 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPC1213PC8 | EPC1064VPC8 |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | Memory ICs | Memory ICs |
| 生命週期狀態 | Obsolete | Obsolete |
| 記憶體類型 | OTP Configuration PROM (EEPROM cell) | OTP Configuration PROM (anti-fuse) |
| 記憶體容量 | 212 Kbit | — |
| 介面 | Serial (4-wire: nCS, DCLK, DATA, OE) | Serial (Altera FPGA configuration) |
| Configuration Mode Supported | FLEX/APEX FPP / PS serial | — |
| 最大時脈頻率 | 6 MHz | — |
| 供應電壓 | 3.0 V to 3.6 V | — |
| Programmability | One-Time Programmable (OTP) | — |
| Programming Standard | IEEE Std 1532 / Jam STAPL | — |
| Standby Current | < 50 µA typical | — |
| 工作溫度 | 0 °C to +70 °C (Commercial) | [DATA_NEEDED: operating temperature range] |
| 封裝 | 8-Pin PDIP (R-PDIP-T8) | 8-Pin PDIP (Through-Hole) |
| 安裝類型 | Through-Hole | Through-Hole |
| 腳位數 | 8 | — |
| RoHS 狀態 | Compliant (post-lead-free Altera revision) | Non-compliant (per distributor data) |
| Lead-Free | Yes | — |
| JEDEC Package Code | R-PDIP-T8 | — |
| Memory Organization | — | 64K x 1 (65 kb) |
| Supply Voltage (VCC) | — | 3.0 V to 3.6 V |
| Programmable Type | — | OTP (One-Time-Programmable) |
| Package Dimensions | — | 0.300 inch (7.62 mm) PDIP |
| Target FPGAs | — | ACEX 1K, APEX 20K, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, Mercury, Stratix, Stratix GX, Stratix II, Stratix II GX |
| Series | — | EPC1 |
| Access Time / Clock | — | [DATA_NEEDED: configuration clock frequency] |
| Program/Erase Cycles | — | 1 (OTP) |
| MSL 等級 | — | [DATA_NEEDED: MSL level] |
| Supplier Device Package | — | 8-PDIP |