EPC16UC88 vs EPC16UC88AA 比較

詳細並排比較 EPC16UC88 由 Altera 與 EPC16UC88AA 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EPC16UC88 EPC16UC88AA
品牌 Altera Altera
類別 Memory ICs Memory ICs
生命週期狀態 Unknown Obsolete
Device Type In-system programmable configuration PROM for FPGAs —
Configuration Memory Capacity 16 Mb —
供應電壓 3.3 V core and I/O —
封裝 88-UBGA (11x8) —
Package Family UBGA —
In-System Programmability IEEE Std. 1532 compatible —
Programming Language Support Jam Standard Test and Programming Language (STAPL) —
JTAG Boundary Scan Supported —
nINIT_CONF Function Allows private JTAG instruction to start FPGA configuration —
Configuration Architecture Configuration controller and flash memory —
FPGA Configuration Use Automatic configuration after power-up or system initialization —
Data Output Configuration data output controlled by OE and nCS —
Output Control OE and nCS control tri-state buffer and address counter —
安裝類型 Surface mount Surface Mount
Package Dimensions 11 mm x 8 mm —
RoHS 狀態 [DATA_NEEDED: RoHS status] Compliant
REACH Status [DATA_NEEDED: REACH status] —
工作溫度 [DATA_NEEDED: operating temperature] 0 C to 70 C
Output Current [DATA_NEEDED: output current] —
Configuration Frequency [DATA_NEEDED: configuration frequency] —
AEC-Q100 Qualification [DATA_NEEDED: AEC-Q100 qualification] —
Programmable Type — In System Programmable
記憶體容量 — 16Mb (16,777,216 bits)
記憶體類型 — EEPROM / Flash-based non-volatile
On-Chip Decompression — Yes (~35% bitstream compression)
封裝 / 外殼 — 88-UBGA (11x8 mm)
Packaging — Tray
Supply Voltage (VCC) — 3.0 V to 3.6 V
介面 — Serial + JTAG ISP
Configuration Interface — DCLK / DATA / nCONFIG / nSTATUS handshake to target FPGA
Cascade Support — Up to 8 devices in series
Lead Free — Yes (per DigiKey listing)
Target FPGAs — Altera FLEX 10K, APEX 20K, ACEX 1K and compatible families

資料表與資源

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