EPC16UC88N vs EPC16UI88 比較

詳細並排比較 EPC16UC88N 由 Altera 與 EPC16UI88 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EPC16UC88N EPC16UI88
品牌 Altera Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 NRND NRND
記憶體容量 16 Mbit (16,777,216 bits) —
Programmable Type In System Programmable —
Supply Voltage (Vcc) 3.0 V to 3.6 V —
Configuration Modes Passive Serial (PS), Passive Parallel Synchronous (PPS), Passive Parallel Asynchronous (PPA), JTAG —
On-Chip Decompression Yes (Altera proprietary) —
封裝 / 外殼 88-UBGA (11x8 mm) / 88-LFBGA —
腳位數 88 —
工作溫度 0 °C to +70 °C -40C to +85C (industrial)
Bus-Hold on Data Lines Yes —
Standby Mode Yes (reduced power consumption) —
JTAG Boundary Scan Yes (IEEE 1149.1) —
Programming Interface JTAG (in-system) / Serial (in-system) IEEE 1149.1 JTAG (in-system programmable)
On-Chip Oscillator Yes (internal configuration clock) —
Lead-Free / RoHS Lead-Free (per datasheet) —
安裝類型 Surface Mount Surface Mount
Packaging Tray —
Memory Density — 16 Mb (2 MB)
Configuration Interface — Altera Passive Serial / Passive Parallel (Sync & Async) / JTAG
Core Supply Voltage — 3.3 V
Maximum Configuration Clock — 100 MHz
Cascading Support — Multi-device configuration chains
Supported FPGA Families — Altera Cyclone II/III/IV, Stratix II/III, APEX II
封裝 — 88-ball UBGA (Ultra FineLine BGA), 11x8 mm
Standby Current — [DATA_NEEDED: standby current]
Active Configuration Current — [DATA_NEEDED: active configuration current]
Programming Cycles — [DATA_NEEDED: programming endurance cycles]
RoHS 狀態 — Compliant
Configuration Time — [DATA_NEEDED: configuration time for typical 16 Mb bitstream]

資料表與資源

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