EPC2L20 vs EPC2L20N 比較
詳細並排比較 EPC2L20 由 Altera 與 EPC2L20N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPC2L20 | EPC2L20N |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | Memory ICs | Memory ICs |
| 生命週期狀態 | Obsolete | NRND |
| 記憶體類型 | Configuration PROM (non-volatile) | — |
| 記憶體容量 | 1.6 Mbit | 1.6 Mbit |
| 組織 | 8-bit byte | — |
| 介面 | Serial FPGA configuration + JTAG (IEEE 1149.1 / IEEE 1532) | — |
| Programmability | In-system programmable via JTAG | — |
| Core Supply Voltage (VCCINT) | 3.3 V | — |
| I/O Supply Voltage (VCCIO) | 3.3 V or 5.0 V (VCCSEL selectable) | — |
| Cascade Support | Yes - multi-device daisy chain | Yes (multi-PROM chain via CE control) |
| Boundary Scan | JTAG IEEE 1149.1 BST | — |
| 封裝 | 20-pin PLCC (J-lead) | — |
| 安裝類型 | Surface Mount (PLCC socket compatible) | Surface Mount (J-Lead PLCC) |
| 工作溫度 | [DATA_NEEDED: operating temperature range] | 0C to +70C (commercial) |
| MSL 等級 | [DATA_NEEDED: MSL rating] | 3 (168 hours) |
| RoHS 狀態 | RoHS Compliant (per IC Components listing) | Compliant |
| Process Technology | Low-power CMOS | — |
| Target FPGAs | APEX II, APEX 20K, Mercury, ACEX 1K, Cyclone, Stratix | — |
| 功能 | — | In-System Programmable Configuration PROM for SRAM-based LUT FPGAs |
| Programmable Type | — | In System Programmable (ISP) |
| Supply Voltage - VCCINT/VCCIO | — | 3.0 V to 3.6 V or 4.5 V to 5.5 V |
| 封裝 / 外殼 | — | 20-LCC (J-Lead), PLCC-20 |
| Packaging | — | Tube |
| Supported FPGA Families | — | Altera APEX, ACEX, Cyclone, FLEX 10K, Mercury (per datasheet) |
| Configuration Interface | — | Serial (Altera FPP / PS configuration scheme) |
| Programming Method | — | In-system via 4-wire ISP / JTAG-style |
| 腳位數 | — | 20 |
| Lead Finish | — | Matte Tin (Pb-free) |