EPC2L20N vs EPC2L20 比較

詳細並排比較 EPC2L20N 由 Altera 與 EPC2L20 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EPC2L20N EPC2L20
品牌 Altera Altera
類別 Memory ICs Memory ICs
生命週期狀態 NRND Obsolete
功能 In-System Programmable Configuration PROM for SRAM-based LUT FPGAs —
記憶體容量 1.6 Mbit 1.6 Mbit
Programmable Type In System Programmable (ISP) —
Supply Voltage - VCCINT/VCCIO 3.0 V to 3.6 V or 4.5 V to 5.5 V —
封裝 / 外殼 20-LCC (J-Lead), PLCC-20 —
Packaging Tube —
工作溫度 0C to +70C (commercial) [DATA_NEEDED: operating temperature range]
Supported FPGA Families Altera APEX, ACEX, Cyclone, FLEX 10K, Mercury (per datasheet) —
Configuration Interface Serial (Altera FPP / PS configuration scheme) —
Cascade Support Yes (multi-PROM chain via CE control) Yes - multi-device daisy chain
Programming Method In-system via 4-wire ISP / JTAG-style —
安裝類型 Surface Mount (J-Lead PLCC) Surface Mount (PLCC socket compatible)
腳位數 20 —
Lead Finish Matte Tin (Pb-free) —
MSL 等級 3 (168 hours) [DATA_NEEDED: MSL rating]
RoHS 狀態 Compliant RoHS Compliant (per IC Components listing)
記憶體類型 — Configuration PROM (non-volatile)
組織 — 8-bit byte
介面 — Serial FPGA configuration + JTAG (IEEE 1149.1 / IEEE 1532)
Programmability — In-system programmable via JTAG
Core Supply Voltage (VCCINT) — 3.3 V
I/O Supply Voltage (VCCIO) — 3.3 V or 5.0 V (VCCSEL selectable)
Boundary Scan — JTAG IEEE 1149.1 BST
封裝 — 20-pin PLCC (J-lead)
Process Technology — Low-power CMOS
Target FPGAs — APEX II, APEX 20K, Mercury, ACEX 1K, Cyclone, Stratix

資料表與資源

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