EPC2LC120 vs EPC2L120 比較
詳細並排比較 EPC2LC120 由 Altera 與 EPC2L120 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPC2LC120 | EPC2L120 |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | Memory ICs | Memory ICs |
| 生命週期狀態 | Obsolete | NRND |
| 功能 | FPGA Configuration Memory Device | — |
| Memory Density | 2 Mbit | — |
| Compatible FPGA Families | FLEX, ACEX, APEX, Mercury (Altera) | — |
| 封裝 | PLCC-120 | PLCC-20 |
| 腳位數 | 120 | — |
| 供應電壓 | 3.3 V | — |
| Programming Interface | JTAG IEEE 1149.1 | — |
| Configuration Modes | PS (serial), PPA (parallel), multi-device daisy chain | — |
| 工作溫度 | [DATA_NEEDED: operating temperature range] | -40 C to +85 C |
| Storage Temperature | [DATA_NEEDED: storage temperature] | — |
| 安裝類型 | Surface Mount / Socket | Surface Mount |
| MSL 等級 | [DATA_NEEDED: MSL rating] | — |
| Lead-Free / RoHS | [DATA_NEEDED: RoHS status] | — |
| Data Compression Support | Yes (Altera proprietary, up to 2:1) | — |
| Remote Update Support | Yes (via JTAG multi-mode protocol) | — |
| 記憶體類型 | — | Configuration PROM (Flash-based) |
| Density | — | 120 Kbit |
| Configuration Interface | — | Serial, FPGA-targeted |
| Operating Voltage | — | 2.7 V to 3.6 V (3.3 V typ) |
| In-System Programmability | — | Yes (IEEE 1149.1 JTAG) |
| Compatible FPGAs | — | Altera Cyclone, Cyclone II, APEX-series |
| CONF_DONE Output | — | Open-drain, wire-OR capable |
| Data Retention | — | 20 years (per Altera datasheet family) |
| Program/Erase Cycles | — | 100 cycles minimum |
| RoHS 狀態 | — | unknown |
| Lead-Free | — | unknown |
| Family | — | EPC2 (Enhanced Configuration) |