EPC2LC22N vs EPC2T132N 比較

詳細並排比較 EPC2LC22N 由 Altera 與 EPC2T132N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EPC2LC22N EPC2T132N
品牌 Altera Altera
類別 Memory ICs FPGA & CPLD
生命週期狀態 Obsolete Obsolete
記憶體類型 Configuration PROM (non-volatile) Flash (NOR, serial configuration)
記憶體容量 1.6 Mbit —
供應電壓 2.5 V (LC core) 3.0 V to 3.6 V
介面 Serial configuration / JTAG (IEEE 1149.1) Altera serial configuration (4-wire JTAG for ISP)
Programmability In-system programmable (ISP) via JTAG —
Cascadable Yes - supports multi-device configuration chains —
封裝 PLCC-22 (Plastic Leaded Chip Carrier) TQFP-32 (T132)
安裝類型 Surface Mount / Through Hole socket Surface Mount
工作溫度 [DATA_NEEDED: operating temperature range] -40C to +85C (industrial)
Configuration Compatibility Altera APEX, ACEX, Mercury, Cyclone, Stratix series FPGAs APEX II, APEX 20K, ACEX 1K, FLEX 10K/10KE/6000, Cyclone, Stratix, Mercury
JTAG Pins TCK, TMS, TDI, TDO —
Internal Oscillator Yes (built-in configuration timing) —
MSL 等級 [DATA_NEEDED: MSL rating] [DATA_NEEDED: MSL level]
RoHS 狀態 [DATA_NEEDED: RoHS compliance status] [DATA_NEEDED: RoHS status]
Lead-Free [DATA_NEEDED: lead-free status] [DATA_NEEDED: lead-free status]
Status Legacy / Obsolete (replaced by flash-based FPGA configuration) —
Memory Capacity — 1.6 Mbit (2 Mbit raw, 1.6 Mbit usable)
Serial Clock Frequency — 10 MHz maximum
Program/Erase Endurance — 100,000 cycles per sector
Data Retention — 20 years minimum
In-System Programmable — Yes (IEEE 1149.1 JTAG)
Multi-Device Daisy Chain — Yes (supported)

資料表與資源

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