EPC2T132U vs EPC2T32U-CAF48 比較

詳細並排比較 EPC2T132U 由 Intel 與 EPC2T32U-CAF48 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EPC2T132U EPC2T32U-CAF48
品牌 Intel Altera
類別 Memory ICs Memory ICs
生命週期狀態 Obsolete 最後購買
Manufacturer Intel (formerly Altera) —
Product Type FPGA Configuration Device (Boot PROM) —
Target FPGAs Altera APEX II, Cyclone, Stratix, and other SRAM-based LUT FPGAs —
Configuration Memory Size [DATA_NEEDED: configuration memory size in bits] —
供應電壓 3.3 V —
介面 Serial (Passive Serial), JTAG (IEEE 1149.1), Passive Parallel —
In-System Programmability Yes (via JTAG) —
JTAG Support Yes (IEEE 1149.1 compliant TAP) —
Configuration Clock Internal oscillator (no external crystal required) —
Data Compression Yes (up to 2x compression vs competing PROMs) —
工作溫度 [DATA_NEEDED: operating temperature range] -40 C to +85 C (industrial grade, "U")
封裝 132-pin UQFP (Ultra-thin Quad Flat Pack) 48-pin QFN (CAF suffix)
安裝類型 Surface Mount Surface Mount
MSL 等級 [DATA_NEEDED: MSL level] [DATA_NEEDED: MSL level]
RoHS 狀態 [DATA_NEEDED: RoHS status] Compliant
Lead-Free [DATA_NEEDED: lead-free status] —
生命週期狀態 Obsolete (per Altera/Intel product discontinuance) —
Compatible Quartus Version [DATA_NEEDED: Quartus version supporting EPC2] —
記憶體類型 — Non-volatile flash configuration memory
Memory Density — 2 Mb (2097152 bits)
Configuration Interface — Altera FPP (8-bit) / PS (4-wire) / AS (serial)
Maximum Configuration Clock (DCLK) — 8 MHz
Supply Voltage (VCC) — 3.3 V (typical)
I/O Tolerance — 5 V tolerant
Program/Erase Endurance — 10,000 cycles per sector minimum
Data Retention — 20 years minimum
Programming Interface — IEEE 1149.1 (JTAG) / IEEE 1532
Lead-Free Finish — Yes (CAF suffix indicates lead-free)
Supported FPGA Families — Cyclone, Cyclone II, Stratix, APEX 20K, ACEX 1K, Mercury, Excalibur

資料表與資源

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