EPC8QI100N vs EPC8Q100 比較

詳細並排比較 EPC8QI100N 由 Altera 與 EPC8Q100 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EPC8QI100N EPC8Q100
品牌 Altera Altera
類別 EEPROM FPGA & CPLD
生命週期狀態 NRND Obsolete
Manufacturer Altera (Intel) —
Part Family EPC8 (Enhanced Configuration) —
Device Type Configuration PROM for SRAM-based FPGAs —
記憶體容量 8 Mbit (8,388,608 bits) —
Programmable Type In System Programmable (Flash) —
Configuration Interface Altera serial (4-wire: DATA, DCLK, nCS, nINIT_CONF) Altera EPC serial (DATA, DCLK, nCS, nINIT_CONF, nSTATUS, DONE)
Maximum Configuration Clock 50 MHz —
On-Chip Decompression Yes (Altera compression algorithm) —
Supply Voltage (VCC) 3.0 V to 3.6 V —
工作溫度 -40 °C to +85 °C (Industrial) —
封裝 100-PQFP / 100-BQFP (20 x 14 mm) 100-pin PQFP (20 x 14 mm)
腳位數 100 —
安裝類型 Surface Mount Surface Mount
Lead-Free / RoHS Yes (per distributor listings) [DATA_NEEDED: status]
JTAG (IEEE 1149.1) ISP Supported —
Multi-Device Daisy-Chain Supported —
Target FPGA Families ACEX 1K, APEX 20K, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, Mercury, Stratix, Stratix GX, Stratix II, Stratix II GX —
Packaging Tray —
Memory Density — 8 Mbit (8,388,608 bits)
記憶體類型 — NOR Flash, One-Time-Programmable (OTP) via JTAG
Supply Voltage VCC — 5.0 V (3.3 V core generated on-chip)
Internal Core Voltage — 3.3 V (on-chip LDO)
Maximum EPC Clock — 33 MHz
Programmability — In-system via IEEE 1149.1 JTAG
FPGA Compatibility — APEX 20K, APEX II, Cyclone, Cyclone II, Stratix, Stratix GX
Configuration Mode Support — FPP, PS, AS, JTAG (FPGA-dependent)
Program/Erase Endurance — [DATA_NEEDED: cycle count]
Data Retention — [DATA_NEEDED: minimum years]
工作溫度範圍 — 0 C to +70 C (commercial)
Storage Temperature Range — [DATA_NEEDED: range]
MSL 等級 — [DATA_NEEDED: level]

資料表與資源

瀏覽所有產品 建立 BOM 索取報價