EPF6010ATC100-2 vs EPF6010ANTC100-2 比較

詳細並排比較 EPF6010ATC100-2 由 Altera 與 EPF6010ANTC100-2 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

Intel
EPF6010ANTC100-2 EPF6010ANTC100-2 - FLEX 6000 FPGA, 880 LEs, 71 I/O, 100-TQFP | Intel

EPF6010ANTC100-2 - FLEX 6000 FPGA, 880 LEs, 71 I/O, 100-TQFP | Intel

EPF6010ANTC100-2 ⚠ 最後購買機會

規格比較

參數 EPF6010ATC100-2 EPF6010ANTC100-2
品牌 Altera Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete 最後購買
Series FLEX 6000 —
Family SRAM-based FPGA FLEX 6000 / FLEX 6000A
Manufacturer Intel (formerly Altera) —
Logic Elements / Gates 880 gates (typical) —
Logic Array Blocks (LABs) 88 —
User I/O Pins 71 —
Number of Logic Cells 880 (per FLEX 6000 family datasheet) —
封裝 100-pin TQFP (14x14 mm) 100-pin TQFP (14x14 mm, 0.5 mm pitch)
Speed Grade -2 -2
工作溫度 0C to 70C (commercial) Commercial (0C to +70C)
Core Supply Voltage 3.0 V to 3.6 V (typical 3.3 V) —
I/O Supply Voltage 3.3 V (5 V tolerant inputs per FLEX 6000 family) —
Configuration Interface JTAG (IEEE 1149.1) + serial configuration —
安裝類型 Surface Mount Surface Mount
MSL 等級 [DATA_NEEDED: moisture sensitivity level] 3 (168 hours)
RoHS 狀態 [DATA_NEEDED: RoHS compliance status] [DATA_NEEDED: RoHS compliance]
Process Node [DATA_NEEDED: CMOS process node] —
Total RAM Bits [DATA_NEEDED: embedded RAM] —
Logic Elements — 880
Programmable I/O Pins — 71
Configuration Method — SRAM (volatile), in-system programmable
Programming Interface — IEEE 1149.1 (JTAG) / passive serial / EPC configuration device
Supply Voltage (VCCINT) — 5.0 V (FLEX 6000A); 3.3 V (FLEX 6000)
I/O Standards Supported — TTL, CMOS, PCI (with clamping diodes)
Number of LABs — [DATA_NEEDED: LAB count]
Embedded Memory — [DATA_NEEDED: embedded RAM blocks]
Global Clock Networks — [DATA_NEEDED: global clock count]
Packaging — Tray (per Altera packing standard)

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