EPF8282ALC84-4N vs EPF8636ALC84-4 比較
詳細並排比較 EPF8282ALC84-4N 由 Altera 與 EPF8636ALC84-4 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPF8282ALC84-4N | EPF8636ALC84-4 |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | FLEX 8000 | FLEX 8000 |
| Usable Gates | 2,500 | — |
| Logic Elements | 208 | — |
| Maximum User I/Os | 68 | — |
| Package Type | 84-LCC (J-Lead) | — |
| Package Code | QCCJ (Plastic Leaded Chip Carrier, J-Bend) | — |
| Process Technology | 0.42 µm CMOS SRAM | 0.42 µm CMOS SRAM |
| Supply Voltage VCC | 5.0 V | — |
| Output Supply Voltage VCCIO | 3.3 V or 5.0 V (selectable) | — |
| Maximum Toggle Frequency | 125 MHz | — |
| 工作溫度 | 0 °C to +70 °C (Commercial) | 0 °C to +70 °C (Commercial) |
| Configuration Method | Serial (EPC1/EPC1064/EPC1213/EPC1441) or Parallel EPROM or Controller | Serial (EPC1/EPC1064/EPC1213/EPC1441) or parallel EPROM |
| In-Circuit Reconfigurability | Yes (ICR) | — |
| JTAG Boundary-Scan | Yes (IEEE 1149.1) | — |
| PCI Compliance | PCI Local Bus Specification compliant | — |
| Dedicated Inputs | 4 (synchronous control signals) | — |
| 安裝類型 | Surface Mount (J-Lead) | Surface Mount / Socket |
| Logic Family | CMOS | — |
| RoHS 狀態 | [DATA_NEEDED: RoHS compliance status] | Non-compliant (legacy PLCC, lead-bearing) |
| Number of Logic Cells | — | 504 |
| Number of Logic Array Blocks (LABs) | — | 63 |
| Maximum Usable Gates | — | 6,000 |
| Number of User I/O Pins | — | 68 |
| Maximum Operating Frequency | — | 125 MHz |
| Supply Voltage (Core) | — | 5.0 V |
| I/O Voltage (84-pin PLCC) | — | 5.0 V only (3.3 V I/O NOT supported on this package) |
| Operating Current (typical) | — | 10 mA |
| 封裝 | — | 84-Pin PLCC (J-Lead) |
| Speed Grade | — | -4 |
| Configuration Memory Type | — | Volatile SRAM (requires boot device) |
| Boundary Scan | — | IEEE 1149.1 (JTAG) |