EPM240F100C5N vs EPM240F100C4N 比較
詳細並排比較 EPM240F100C5N 由 Intel 與 EPM240F100C4N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM240F100C5N | EPM240F100C4N |
|---|---|---|
| 品牌 | Intel | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | 啟用中 |
| Device Family | MAX II | CPLD - Complex Programmable Logic Device |
| Logic Elements (LEs) | 240 | — |
| Macrocells | 192 | — |
| User I/O Pins (maximum) | 80 | — |
| Pin-to-Pin Logic Delay (tPD) | 4.7 ns | — |
| Maximum Operating Frequency | [DATA_NEEDED: fmax per datasheet] | — |
| Global Clock Networks | [DATA_NEEDED: count] | — |
| 封裝 | 100-ball FineLine BGA (FBGA-100) | 100-ball FineLine BGA (FBGA), 11 mm × 11 mm, 1.0 mm pitch |
| 工作溫度範圍 | 0C to +85C (commercial) | — |
| Supply Voltage Core (VCCINT) | 3.3 V | — |
| I/O Bank Voltage (VCCIO) | 1.5V / 1.8V / 2.5V / 3.3V (MultiVolt) | — |
| Configuration Memory | Non-volatile flash (instant-on) | On-chip Flash (non-volatile, instant-on) |
| JTAG Support | IEEE 1149.1 boundary-scan | — |
| Programming Interface | JTAG / ByteBlasterMV | JTAG (IEEE 1149.1) |
| 安裝類型 | Surface Mount (BGA) | Surface Mount |
| RoHS 狀態 | Compliant | Compliant (lead-free) |
| Series | — | MAX II |
| Macro Cells | — | 192 |
| Logic Elements | — | 240 |
| User I/Os | — | 80 |
| Propagation Delay (tPD) | — | 4.7 ns |
| Maximum Internal Frequency | — | 247.5 MHz |
| Supply Voltage - Core | — | 2.5 V / 3.3 V |
| I/O Bank Voltage Support | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V |
| Process Technology | — | 0.18 µm Flash |
| User Flash Memory (UFM) | — | 8 Kbit |
| 工作溫度 | — | 0 °C to +85 °C (Commercial) |
| Speed Grade | — | C4 (fastest) |