EPM240F100I5N vs EPM240F100C5N 比較

詳細並排比較 EPM240F100I5N 由 Intel 與 EPM240F100C5N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EPM240F100I5N EPM240F100C5N
品牌 Intel Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 啟用中 啟用中
Series MAX II —
Device Type CPLD (Complex Programmable Logic Device) —
Logic Elements 240 —
Macrocells 192 192
User I/Os 80 —
Package Type FBGA-100 (FineLine BGA) —
Package Code (JEDEC) LBGA100 —
Package Dimensions 11 x 11 mm, 1.0 mm ball pitch —
Logic Family CMOS —
Core Supply Voltage (VCCINT) 1.8 V —
I/O Supply Voltage (VCCIO) 1.5 V / 1.8 V / 2.5 V / 3.3 V (banked) —
Configuration Memory Flash (non-volatile, instant-on) Non-volatile flash (instant-on)
User Flash Memory 8 Kbit —
Internal Oscillator Yes —
JTAG / ISP Support Yes (IEEE 1149.1 boundary scan) —
工作溫度 -40 C to +100 C (industrial, I-grade) —
安裝類型 Surface Mount Surface Mount (BGA)
Lead-Free / RoHS Yes (lead-free FBGA) —
Programming Toolchain Intel Quartus Prime / Quartus II —
Device Family — MAX II
Logic Elements (LEs) — 240
User I/O Pins (maximum) — 80
Pin-to-Pin Logic Delay (tPD) — 4.7 ns
Maximum Operating Frequency — [DATA_NEEDED: fmax per datasheet]
Global Clock Networks — [DATA_NEEDED: count]
封裝 — 100-ball FineLine BGA (FBGA-100)
工作溫度範圍 — 0C to +85C (commercial)
Supply Voltage Core (VCCINT) — 3.3 V
I/O Bank Voltage (VCCIO) — 1.5V / 1.8V / 2.5V / 3.3V (MultiVolt)
JTAG Support — IEEE 1149.1 boundary-scan
Programming Interface — JTAG / ByteBlasterMV
RoHS 狀態 — Compliant

資料表與資源

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