EPM240GF100C5N vs EPM240GF100I5N 比較
詳細並排比較 EPM240GF100C5N 由 Intel 與 EPM240GF100I5N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM240GF100C5N | EPM240GF100I5N |
|---|---|---|
| 品牌 | Intel | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | 啟用中 |
| Family | MAX II | — |
| Logic Elements / Macro Cells | 192 macro cells | — |
| Pin-to-Pin Logic Delay (tPD) | 4.7 ns | — |
| Maximum Operating Frequency | 201.1 MHz | — |
| User I/Os | 80 | — |
| Logic Family | CMOS | CMOS |
| Process Technology | 0.18 um | — |
| Core Supply Voltage (VCCINT) | 1.8 V | — |
| I/O Supply Voltage (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) |
| User Flash Memory | 8 Kbits | — |
| 封裝 | 100-ball FBGA (11 x 11 mm, 1.0 mm pitch) | 100-ball FBGA (FineLine BGA), 11 mm x 11 mm, 1.0 mm pitch |
| 安裝類型 | Surface Mount | Surface Mount |
| 工作溫度 | -40 C to +125 C | — |
| Programming Interface | JTAG (IEEE 1149.1) / Jam STAPL | — |
| Configuration Memory | On-chip non-volatile Flash | — |
| RoHS 狀態 | Lead Free, RoHS compliant | — |
| Series | — | MAX II |
| Logic Elements / Blocks | — | 240 LE |
| Number of Macrocells | — | 192 |
| Maximum User I/O | — | 80 |
| Propagation Delay (tpd, max) | — | 4.7 ns |
| Programmable Type | — | In-System Programmable (ISP) |
| Non-Volatile Memory | — | On-chip flash configuration |
| Internal Supply Voltage | — | 1.71 V to 1.89 V (regulated on-chip) |
| Operating Temperature (TJ) | — | -40 C to +100 C |
| JTAG Support | — | IEEE 1149.1 / IEEE 1532 compliant |
| Lead-Free / RoHS | — | Yes (lead-free, RoHS compliant) |
| Vertical Migration Family | — | EPM240 / EPM570 / EPM1270 / EPM2210 in same-package footprint |