EPM240T100A5N vs EPM240T100C3N 比較
詳細並排比較 EPM240T100A5N 由 Altera 與 EPM240T100C3N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM240T100A5N | EPM240T100C3N |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | 啟用中 |
| Family | MAX II | — |
| Macro Cells | 192 | — |
| Logic Elements (LE) | 240 | 240 |
| User I/O Count | 80 | — |
| Pin-to-Pin Logic Delay (tPD) | 4.7 ns | 4.4 ns (typical) |
| Maximum Internal Frequency | 201.1 MHz | — |
| 供應電壓 | 2.5 V / 3.3 V | — |
| I/O Bank Count | 4 (multi-voltage) | — |
| Process Technology | 0.18 µm | — |
| Configuration Memory | On-chip Flash (instant-on) | Internal Flash (non-volatile) |
| Programming Interface | JTAG (IEEE 1149.1) / ISP | JTAG (IEEE 1149.1) / ISP |
| 封裝 | 100-pin TQFP (14 x 14 x 1.0 mm) | 100-pin TQFP (14x14 mm) |
| 工作溫度 | 0C to +85C (commercial, "A5N" suffix) | 0 °C to +85 °C (commercial) |
| 安裝類型 | Surface Mount | Surface Mount |
| RoHS 狀態 | Compliant (Pb-free) | Compliant |
| Series | — | MAX II |
| Device Family | — | MAX II CPLD (EPM240) |
| Macrocells | — | 192 |
| User I/O Pins | — | 80 |
| User Flash Memory (UFM) | — | 8 Kbits |
| Maximum Operating Frequency | — | 200 MHz (internal oscillator) |
| Core Supply Voltage (VCCINT) | — | 3.0 V to 3.6 V |
| I/O Supply Voltage (VCCIO) | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V |
| Quiescent Current (typical) | — | 35 mA |
| MSL 等級 | — | [DATA_NEEDED: MSL rating] |