EPM3032ATC44-10NAB vs EPM3032ATC44-7N 比較
詳細並排比較 EPM3032ATC44-10NAB 由 Intel 與 EPM3032ATC44-7N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Intel
EPM3032ATC44-10NAB - 32-Macrocell CPLD, 10ns, 3.3V | Intel (Altera)
EPM3032ATC44-10NAB Obsolete規格比較
| 參數 | EPM3032ATC44-10NAB | EPM3032ATC44-7N |
|---|---|---|
| 品牌 | Intel | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | 最後購買 |
| Product Family | MAX 3000A | — |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Logic Elements / Macrocells | 32 macrocells | 32 macrocells |
| Usable Gates | 600 | 600 gates |
| Pin-to-Pin Delay (tPD) | 10 ns | — |
| Maximum Operating Frequency | 103.1 MHz (per Arrow listing) | — |
| Number of User I/O | 34 (max for 44-pin TQFP package) | — |
| Core Supply Voltage (VCCINT) | 3.3 V | 3.3 V |
| I/O Supply Voltage (VCCIO) | 3.3 V (MultiVolt I/O compatible with 5.0 V, 3.3 V, 2.5 V logic) | 2.5 V / 3.3 V / 5.0 V (MultiVolt I/O) |
| 封裝 | 44-pin TQFP | 44-TQFP |
| 安裝類型 | Surface Mount | Surface Mount |
| Programming Interface | JTAG (IEEE Std. 1149.1 / IEEE Std. 1532 ISP) | JTAG (IEEE Std. 1149.1) ISP |
| Configuration Memory | Non-volatile EEPROM | EEPROM (non-volatile) |
| Hot-Socketing Support | Yes | — |
| 工作溫度 | [DATA_NEEDED: operating temperature range] | 0 C to +70 C (commercial) |
| RoHS 狀態 | Compliant (per -NAB suffix convention) | Compliant |
| Delivery Form | Tray ('AB' suffix per Altera order code convention) | — |
| Process Technology | CMOS, EEPROM-based | CMOS |
| Family | — | MAX 3000A |
| Logic Array Blocks | — | 2 LABs |
| Number of User I/O Pins | — | 34 |
| Propagation Delay (tPD) | — | 7.5 ns |
| Maximum Internal Frequency | — | 138.9 MHz |