EPM3064ATI44-4N vs EPM3064ATI44-7 比較

詳細並排比較 EPM3064ATI44-4N 由 Altera 與 EPM3064ATI44-7 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EPM3064ATI44-4N EPM3064ATI44-7
品牌 Altera Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 NRND Obsolete
Family MAX 3000A MAX 3000A
Device Type CPLD (Complex Programmable Logic Device) —
Logic Elements / Macrocells 64 macrocells —
Usable Gates 1,250 gates 1,250
Number of Logic Array Blocks (LABs) 4 LABs (16 macrocells each) —
Maximum Operating Frequency 222.2 MHz —
Pin-to-Pin Propagation Delay (tPD) 4.5 ns (-4 speed grade) —
Supply Voltage - Core (VCCINT) 3.3 V —
Supply Voltage - I/O (VCCIO) 3.3 V or 2.5 V —
User I/O Pins 34 I/O —
封裝 44-pin TQFP 44-pin TQFP (TI44)
工作溫度 -40C to +85C (industrial) -40 °C to +85 °C (Industrial, 'I' suffix)
Programming Interface IEEE Std. 1149.1 JTAG, IEEE Std. 1532 ISP —
Configuration Memory EEPROM (non-volatile) —
安裝類型 Surface Mount Surface Mount
RoHS 狀態 [DATA_NEEDED: rohs status] [DATA_NEEDED: RoHS status]
Product Type — CPLD (Complex Programmable Logic Device)
Macrocells — 64
User I/O — 34
Logic Array Blocks (LABs) — 4 (16 macrocells each)
Propagation Delay (tPD) — 7.5 ns
Maximum Internal Frequency (fMAX) — 135.1 MHz
Supply Voltage (VCCINT) — 3.0 V to 3.6 V
Supply Voltage (VCCIO) — 3.0 V to 3.6 V
Process Technology — 0.30 µm CMOS EEPROM
In-System Programmability — Yes, IEEE Std. 1532 compliant
JTAG Support — Yes (IEEE 1149.1)
PCI Compliance — Yes, speed grades -4/-5/-6/-7/-10 meet PCI SIG Rev. 2.2
MSL 等級 — [DATA_NEEDED: MSL level]

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