EPM3128ATC100-7 vs EPM3128ATC100-5 比較

詳細並排比較 EPM3128ATC100-7 由 Intel 與 EPM3128ATC100-5 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EPM3128ATC100-7 EPM3128ATC100-5
品牌 Intel Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete Obsolete
Family MAX 3000A CPLD - MAX 3000A
Device Type CPLD (Complex Programmable Logic Device) —
Macro Cells 128 —
Typical Gates 2500 —
User I/Os 80 80
Logic Elements / LABs 4 Logic Array Blocks (LABs) —
Propagation Delay (tPD) 7.5 ns —
Counter Frequency (fCNT) 129.9 MHz —
Supply Voltage (VCCINT) 3.3 V —
I/O Voltage Tolerance 5.0 V tolerant inputs —
Programming Technology EEPROM (non-volatile, in-system programmable) —
ISP Standard IEEE Std. 1532 (JTAG) —
封裝 100-pin TQFP, 14x14 mm, 0.5 mm pitch 100-pin TQFP (Fine Line)
工作溫度 0C to +70C (Commercial) 0 °C to 70 °C (Commercial)
Speed Grade -7 (fastest grade in family) —
Process Technology CMOS EEPROM CMOS EEPROM
RoHS 狀態 [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS status]
Lead-Free [DATA_NEEDED: lead-free status] —
Series — MAX 3000A
Macrocells — 128
Usable Gates — 2,500
Dedicated Inputs — 4
Pin-to-Pin Delay (tpd) — 5 ns (commercial); 7.5 ns
Maximum Frequency (fCNT) — 192.3 MHz
Supply Voltage (VCCINT/VCCIO) — 3.3 V
Output Drive Voltage — 2.5 V or 3.3 V (programmable)
Input Tolerance — 2.5 V, 3.3 V, 5.0 V tolerant
Program Memory Type — EEPROM
In-System Programmability — Yes, IEEE Std. 1532 compliant
JTAG Boundary Scan — Yes, IEEE Std. 1149.1
安裝類型 — Surface Mount
Logic Family — CMOS

資料表與資源

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