EPM3128ATC100-7 vs EPM3128ATC100-5N 比較
詳細並排比較 EPM3128ATC100-7 由 Intel 與 EPM3128ATC100-5N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM3128ATC100-7 | EPM3128ATC100-5N |
|---|---|---|
| 品牌 | Intel | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | 啟用中 |
| Family | MAX 3000A | — |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macro Cells | 128 | — |
| Typical Gates | 2500 | — |
| User I/Os | 80 | 80 |
| Logic Elements / LABs | 4 Logic Array Blocks (LABs) | — |
| Propagation Delay (tPD) | 7.5 ns | 5 ns |
| Counter Frequency (fCNT) | 129.9 MHz | — |
| Supply Voltage (VCCINT) | 3.3 V | 3.3 V |
| I/O Voltage Tolerance | 5.0 V tolerant inputs | — |
| Programming Technology | EEPROM (non-volatile, in-system programmable) | EEPROM (non-volatile) |
| ISP Standard | IEEE Std. 1532 (JTAG) | — |
| 封裝 | 100-pin TQFP, 14x14 mm, 0.5 mm pitch | TQFP-100 (TC100) |
| 工作溫度 | 0C to +70C (Commercial) | 0 C to +70 C (commercial) |
| Speed Grade | -7 (fastest grade in family) | — |
| Process Technology | CMOS EEPROM | — |
| RoHS 狀態 | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance] |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Device Family | — | MAX 3000A |
| Product Type | — | CPLD (Complex Programmable Logic Device) |
| Macrocells | — | 128 |
| Logic Array Blocks (LABs) | — | 8 (16 macrocells each) |
| Usable Gates | — | Up to 10,000 |
| Maximum Internal Frequency | — | 192.3 MHz |
| I/O Supply Voltage (VCCIO) | — | 3.3 V or 2.5 V |
| In-System Programmability | — | Yes (IEEE Std. 1532) |
| JTAG Boundary Scan | — | Yes (IEEE 1149.1) |
| 安裝類型 | — | Surface Mount |