EPM3512AQC20810 vs EPM3256AQC208-10N 比較
詳細並排比較 EPM3512AQC20810 由 Altera 與 EPM3256AQC208-10N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM3512AQC20810 | EPM3256AQC208-10N |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | MAX 3000A | — |
| Logic Type | CPLD (EEPROM-based, non-volatile) | — |
| Macro Cells | 512 | — |
| User I/Os | 172 | — |
| Logic Array Blocks (LABs) | 16 | — |
| Usable Gates (equivalent) | 10000 | — |
| 封裝 | 208-pin PQFP (PQ208) | — |
| Speed Grade | -10 (tPD = 10 ns) | — |
| Propagation Delay (tPD) | 10 ns | — |
| Maximum Internal Frequency | 132 MHz | — |
| Core Supply Voltage (VCCINT) | 3.3 V | — |
| I/O Supply Voltage (VCCIO) | 3.3 V | — |
| In-System Programmability | Yes (IEEE 1149.1 JTAG, 3.3 V ISP) | — |
| PCI Compliance | PCI Local Bus Specification Revision 2.2 compliant | — |
| Operating Temperature (commercial) | 0 °C to +70 °C | — |
| Process Technology | 0.30 µm CMOS EEPROM | — |
| Configuration Memory | On-chip EEPROM, non-volatile, 100+ cycles, 10+ year retention | — |
| RoHS 狀態 | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: lead-free status - non-RoHS suffix 'N' typically indicates lead-free finish, but datasheet not present in data] |
| Series | — | MAX 3000A |
| Programmable Type | — | In-System Programmable (EEPROM) |
| Number of Macrocells | — | 256 |
| Number of Logic Elements/Blocks | — | 16 LABs |
| Usable Gates | — | 10,000 |
| Number of I/O Pins | — | 161 (158 user I/O per Arrow listing) |
| Propagation Delay (tpd) | — | 10 ns (max) |
| Maximum Counter Frequency | — | 227.3 MHz |
| Supply Voltage - Internal | — | 3.0 V to 3.6 V (3.3 V typical) |
| 工作溫度 | — | 0C to +70C (Commercial) |
| 封裝 / 外殼 | — | 208-BFQFP / 208-PQFP (28x28 mm) |
| 安裝類型 | — | Surface Mount |
| ISP Compliance | — | IEEE Std. 1532 |
| Boundary Scan | — | IEEE Std. 1149.1 (JTAG) |
| I/O Tolerance | — | 5 V tolerant, MultiVolt interface |