EPM5064LI vs EPM5064LC-2 比較
詳細並排比較 EPM5064LI 由 Altera 與 EPM5064LC-2 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM5064LI | EPM5064LC-2 |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | MAX 5000 | — |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 64 | 64 |
| Logic Array Blocks (LABs) | 4 | 4 |
| Number of Terminals | 44 | — |
| Package Code | QCCJ (PLCC-44, J-bend) | — |
| Package Shape | Square | — |
| Configuration Memory | UV-Erasable / OTP (EPROM-based) | — |
| Supply Voltage (VCC) | 4.5 V to 5.5 V | 4.75 V to 5.25 V (5 V nominal) |
| Operating Temperature Grade | Industrial | — |
| 最大時脈頻率 | 33.3 MHz | — |
| Propagation Delay (tPD) | 55 ns (typical) | 45 ns |
| I/O Pins | 28 bidirectional | — |
| Dedicated Inputs | 7 | — |
| Total User Inputs | 36 | — |
| Process Technology | 1-micron EPIC CMOS | CMOS, OTP EPROM (UV-erasable base) |
| Latch-up Immunity | 500 mA typical at 125 C | — |
| 安裝類型 | Surface Mount | Surface Mount |
| RoHS 狀態 | [DATA_NEEDED: confirm RoHS status - legacy Altera part] | [DATA_NEEDED: not specified in source] |
| Device Family | — | MAX 5000 |
| Product Type | — | CPLD (Complex Programmable Logic Device) |
| Logic Elements per LAB | — | 16 |
| Number of Inputs | — | 36 (7 dedicated + 28 I/O) |
| Number of I/O Pins | — | 28 |
| Number of Flip-Flops | — | 28 |
| Maximum Internal Frequency | — | 40 MHz |
| Programmable Polarity | — | Yes |
| Programmable Output Enable | — | Yes, per macrocell |
| 工作溫度 | — | -40 C to +85 C (commercial LC grade) [DATA_NEEDED: explicit min/max in source] |
| 封裝 | — | PLCC-44 (J-Lead, plastic) |
| Programming Method | — | Altera byte-wide / JTAG programmer |