EPM5130LC vs EPM5130GM883B 比較
詳細並排比較 EPM5130LC 由 Altera 與 EPM5130GM883B 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM5130LC | EPM5130GM883B |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | 最後購買 |
| Series | MAX 5000 | MAX 5000 |
| Family | MAX 5000 (EPM51xx) | — |
| Macrocells | 128 | 128 |
| Logic Array Blocks (LABs) | 8 | — |
| User I/O Pins | 48 | [DATA_NEEDED: maximum user I/O count] |
| Total Inputs (Dedicated + I/O) | 68 | — |
| Dedicated Inputs | 19 | — |
| Propagation Delay (tPD) | 55 ns | — |
| Maximum Internal Clock Frequency | 50 MHz | — |
| Global Clock Inputs | 1 | — |
| Configuration Technology | UV-Erasable / OTP EPROM | — |
| Process Technology | CMOS (0.7 um EPROM) | — |
| Supply Voltage (VCC) | 4.5 V to 5.5 V | — |
| I/O Standard | TTL-compatible | — |
| 封裝 | JLCC-68 (J-Lead Ceramic Chip Carrier) | 100-pin CPGA (S-CPGA-P100) |
| 工作溫度 | [DATA_NEEDED: commercial/industrial/military grade] | -55C to +125C (MIL-STD-883B screening) |
| 安裝類型 | Surface Mount | Through-Hole (Pin Grid Array) |
| RoHS 狀態 | Non-compliant (ceramic JLCC, contains lead) | [DATA_NEEDED: RoHS compliance status] |
| Manufacturer | — | Altera (now Intel Programmable Solutions Group) |
| Device Type | — | CPLD - Complex Programmable Logic Device |
| Usable Gates | — | 5,000 |
| 腳位數 | — | 100 |
| 供應電壓 | — | 5 V |
| Logic Family | — | CMOS, TTL-compatible |
| Configuration Memory | — | Non-volatile EEPROM |
| Propagation Delay | — | [DATA_NEEDED: tpd in ns] |
| Screening Level | — | MIL-STD-883B Class B |
| Lead Free Status | — | Lead free / RoHS Compliant (per ICComponents listing) |
| Programmable Security | — | Yes (security bit) |