EPM5192AGC-20 vs EPM5192AJC-25 比較
詳細並排比較 EPM5192AGC-20 由 Intel 與 EPM5192AJC-25 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM5192AGC-20 | EPM5192AJC-25 |
|---|---|---|
| 品牌 | Intel | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | MAX 5000 | MAX 5000 EPLD |
| Device Type | EPLD (EEPLD, UV-erasable) | — |
| Macrocells | 192 | 192 |
| Usable Gates | 12,000 | — |
| Propagation Delay (tPD) | 20 ns | 25 ns |
| Counter Frequency (fCNT) | 100 MHz (max) | — |
| Supply Voltage (VCC) | 5 V (4.75 V to 5.25 V) | — |
| Logic Array Blocks (LABs) | 8 | — |
| Dedicated I/O Pins | 96 | — |
| Programming Interface | IEEE 1149.1 JTAG | — |
| In-System Programmability | Yes (5 V ISP) | — |
| Security Bit | Yes (pattern read-back protected) | — |
| 封裝 | PGA-132 (ceramic windowed, 'GC') | PLCC-68 (windowed ceramic, AJC) |
| 安裝類型 | Through-hole (PGA socket) | Surface Mount |
| 工作溫度 | 0C to 70C (commercial) | [DATA_NEEDED: exact operating temperature range] |
| RoHS 狀態 | [DATA_NEEDED: RoHS status - ceramic PGA windowed parts are typically pre-RoHS] | [DATA_NEEDED: RoHS compliance status] |
| Manufacturer | — | Altera (now Intel PSG) |
| 腳位數 | — | 68 |
| 供應電壓 | — | 5 V (typical) |
| Logic Blocks | — | MAX 5000 LABs (Logic Array Blocks) |
| Programmable Pins | — | [DATA_NEEDED: number of user I/O pins] |
| Erasure Method | — | UV-erasable (windowed ceramic package) |
| Programming Technology | — | EPROM (non-volatile) |
| Military Grade | — | Likely MIL-STD-883 processing per 'J' suffix in AJC marking (verify) |