EPM5192ALM84-15 vs EPM5192AJC84-15 比較
詳細並排比較 EPM5192ALM84-15 由 Altera 與 EPM5192AJC84-15 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Altera
EPM5192AJC84-15 - MAX 5000 CPLD, 192 Macrocells, 84-pin PLCC | Altera
EPM5192AJC84-15 Obsolete規格比較
| 參數 | EPM5192ALM84-15 | EPM5192AJC84-15 |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Device Type | OTP Complex Programmable Logic Device (CPLD) | EPLD (Erasable Programmable Logic Device) |
| Series | MAX 5000 | — |
| Macrocells | 192 | 192 |
| Propagation Delay (tPD) | 15 ns (per '-15' speed grade suffix) | — |
| Propagation Delay (vendor-stated) | 25 ns (per MicrochipUSA listing) | — |
| Maximum Internal Frequency | 83.3 MHz | — |
| Supply Voltage (VCC) | 4.5 V to 5.5 V (nominal 5 V) | 5 V (single supply) |
| Technology | CMOS | CMOS, UV-erasable EPROM |
| Programmability | Windowless, OTP (One-Time Programmable) | — |
| Package Type | PLCC-84 (QCCJ, J-bend, square) | — |
| Number of Terminals | 84 | — |
| Terminal Form | J BEND | — |
| Temperature Grade | MILITARY | — |
| 安裝類型 | Surface Mount / Socket (PLCC) | Surface Mount |
| RoHS 狀態 | [DATA_NEEDED: RoHS compliance status] | Non-compliant (contains Pb, ceramic windowed package) |
| 工作溫度範圍 | [DATA_NEEDED: exact military temp range] | — |
| Family | — | MAX 5000 |
| Propagation Delay (tpd) | — | 15 ns |
| Maximum Clock Frequency (fMAX) | — | 83.3 MHz |
| 封裝 | — | 84-pin PLCC (J84C) windowed ceramic |
| 工作溫度 | — | [DATA_NEEDED: commercial/industrial/military grade] |
| Programming Method | — | UV-erase + EPROM programming (windowed package) |
| Logic Blocks | — | 16 Logic Array Blocks (LABs) |
| I/O Pins | — | [DATA_NEEDED: user I/O count] |
| Process Technology | — | CMOS EPROM |