EPM5192AQC-1 vs EPM5192C-2 比較
詳細並排比較 EPM5192AQC-1 由 Altera 與 EPM5192C-2 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM5192AQC-1 | EPM5192C-2 |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | MAX 5000 | MAX 5000 |
| Device Type | One-Time Programmable (OTP) CPLD | Complex Programmable Logic Device (CPLD) |
| Macrocells | 192 | 192 |
| Logic Elements / Logic Array Blocks | [DATA_NEEDED: number of LABs] | — |
| Propagation Delay (tPD) | 40 ns | — |
| Maximum Operating Frequency | [DATA_NEEDED: fMAX value] | 50 MHz |
| User I/O Pins | 64 | 64 |
| Dedicated Inputs | 7 | 7 |
| Total Inputs / Outputs | 72 inputs / 64 outputs | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V | — |
| Nominal Supply Voltage | 5 V | — |
| 工作溫度範圍 | 0 °C to +70 °C (commercial) | — |
| 封裝 | PQFP-100 (Plastic Quad Flat Pack) | — |
| Terminal Pitch | 0.635 mm | — |
| Technology | CMOS, UV-Erasable / OTP EPROM | — |
| Configuration Method | One-Time Programmable (OTP) / UV-Erasable | — |
| 安裝類型 | Surface Mount | — |
| RoHS 狀態 | [DATA_NEEDED: RoHS status] | unknown |
| Lead-Free | [DATA_NEEDED: lead-free status] | unknown |
| Logic Array Blocks (LABs) | — | 12 |
| External Clock Inputs | — | 1 |
| Propagation Delay (PIA, typical) | — | 45 ns |
| Process Technology | — | CMOS |
| Configuration Memory | — | EEPROM (non-volatile) |
| Programmable Interconnect | — | Programmable Interconnect Array (PIA) |
| Speed Grade | — | -2 |
| Programming Interface | — | JTAG / Altera MAX+ programming |