EPM5192JC vs EPM5192JC1 比較
詳細並排比較 EPM5192JC 由 Intel 與 EPM5192JC1 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM5192JC | EPM5192JC1 |
|---|---|---|
| 品牌 | Intel | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Product Type | CPLD (Complex Programmable Logic Device) | — |
| Series | EPM5192 (Classic / MAX-class) | — |
| Macrocells | 192 | — |
| Logic Array Blocks (LABs) | 12 | — |
| Interconnect Architecture | Programmable Interconnect Array (PIA) | — |
| Process Technology | CMOS EPROM (UV-erasable) | 0.5 µm CMOS, UV-erasable EPROM |
| 封裝 | 68-pin PLCC (JC) windowed ceramic | [DATA_NEEDED: exact package from datasheet] |
| 安裝類型 | Surface Mount | [DATA_NEEDED: surface mount or through-hole] |
| Programming Method | UV-erase + EPROM programmer | — |
| Non-Volatile Configuration | Yes (EPROM cell array) | — |
| Logic Family | Classic CPLD (EPM5xxx series) | — |
| 工作溫度 | [DATA_NEEDED: commercial / industrial / military grade] | [DATA_NEEDED: operating temp range] |
| 供應電壓 | [DATA_NEEDED: VCC nominal] | — |
| Propagation Delay | [DATA_NEEDED: tpd spec by speed grade] | — |
| RoHS 狀態 | [DATA_NEEDED: original Altera marking not RoHS] | unknown |
| Family | — | MAX 5000 (MAX 5xxx CPLD) |
| Manufacturer | — | Intel (formerly Altera Corporation) |
| Macro Cells | — | 192 |
| Usable Gates | — | 3750 |
| Maximum Operating Frequency | — | 62.5 MHz |
| Supply Voltage (VCC) | — | 5 V (nominal) |
| Propagation Delay (typ) | — | [DATA_NEEDED: propagation delay in ns] |
| I/O Pins | — | [DATA_NEEDED: I/O pin count] |
| Programming Interface | — | JTAG-compatible (Altera MAX 5xxx) |
| Logic Blocks (LABs) | — | 24 (8 macrocells per LAB) |
| AEC-Q100 | — | not_applicable |
| Lifecycle | — | Obsolete - last-time-buy stock only at franchised distributors |