EPM5192LC-M205A vs EPM5192LC-2 比較
詳細並排比較 EPM5192LC-M205A 由 Altera 與 EPM5192LC-2 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM5192LC-M205A | EPM5192LC-2 |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | NRND | Obsolete |
| Family | MAX 5000 | MAX 5000 |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macrocells | 192 | 192 |
| Logic Array Blocks (LABs) | 12 | 12 |
| Dedicated Inputs | 7 | — |
| I/O Pins | 64 | — |
| Propagation Delay (tPD) | 55 ns | 45 ns (typical, -2 speed grade) |
| Supply Voltage (VCC) | 5 V | — |
| Technology | CMOS EPROM (UV-erasable / OTP) | — |
| Programmable Interconnect | Programmable Interconnect Array (PIA) | — |
| Global Clock Inputs | 1 | — |
| 工作溫度 | [DATA_NEEDED: operating temperature grade] | [DATA_NEEDED: commercial/industrial/military grade] |
| Package Type | 205-pin (M205A) | — |
| 安裝類型 | Surface Mount | — |
| RoHS 狀態 | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: pre-RoHS legacy part — likely non-RoHS] |
| Configuration Memory | UV-erasable / OTP EPROM | — |
| User I/O Pins | — | 64 |
| Dedicated Input Pins | — | 7 |
| External Clock Inputs | — | 1 |
| Maximum Internal Frequency | — | 50 MHz |
| Interconnect | — | Programmable Interconnect Array (PIA) |
| Process Technology | — | CMOS |
| 封裝 | — | PQCC-84 (PLCC-84, J-lead, surface mount) |
| Programming | — | Non-volatile (EPROM/EEPROM-based, in-system programmable via JTAG) |
| 供應電壓 | — | 5 V (typical MAX 5000 family) |