EPM570GM100C5N vs EPM570T100A5N 比較
詳細並排比較 EPM570GM100C5N 由 Intel 與 EPM570T100A5N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM570GM100C5N | EPM570T100A5N |
|---|---|---|
| 品牌 | Intel | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | 啟用中 |
| Family | MAX II | — |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macro Cells | 440 | — |
| User I/Os | 76 | — |
| Logic Elements | 440 | 570 |
| 腳位數 | 100 | — |
| Package Type | Micro FBGA-100 (MBGA), 6 x 6 mm, 0.5 mm pitch | — |
| Pin-to-Pin Delay (tPD) | 5.4 ns | — |
| Maximum Frequency | 201.1 MHz | — |
| 工作溫度 | -40C to +125C (industrial) | -40 °C to +125 °C (industrial) |
| 供應電壓 | 1.8 V core (MultiVolt I/O 1.5 V to 3.3 V) | — |
| Program Memory Type | Flash (non-volatile, in-system programmable) | — |
| Programming Interface | JTAG (IEEE 1149.1) | JTAG (IEEE 1149.1) - ISP |
| 安裝類型 | Surface Mount | Surface Mount |
| Lead Free / RoHS | Yes / Compliant | — |
| Logic Family | CMOS | — |
| Device Family | — | MAX II |
| Macrocells | — | 440 |
| User I/O Pins | — | 76 |
| Number of Logic Array Blocks (LABs) | — | 57 |
| 封裝 | — | 100-pin TQFP |
| Pin-to-Pin Logic Delay (tPD) | — | 5.4 ns |
| Maximum Internal Frequency | — | 304 MHz |
| Core Supply Voltage (VCCINT) | — | 1.8 V (typical) |
| I/O Supply Voltage (VCCIO) | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) |
| User Flash Memory (UFM) | — | 8 Kbits |
| Configuration Memory | — | On-chip non-volatile flash |
| RoHS 狀態 | — | Compliant |