EPM570M100I5N vs EPM570F100I5 比較

詳細並排比較 EPM570M100I5N 由 Intel 與 EPM570F100I5 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EPM570M100I5N EPM570F100I5
品牌 Intel Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 啟用中 啟用中
Family MAX II MAX II
Device Type CPLD (Complex Programmable Logic Device) —
Number of Macrocells 440 —
Number of Logic Array Blocks 4 LABs (110 macrocells each) —
Maximum Operating Frequency 201.1 MHz —
Pin-to-Pin Logic Delay 5.4 ns —
User I/Os 76 —
User Flash Memory 8 Kbits —
Process Technology 0.18 µm CMOS 0.18 µm
Supply Voltage - Core (VCCINT) 2.5 V / 3.3 V —
Supply Voltage - I/O (VCCIO) 1.5 V / 1.8 V / 2.5 V / 3.3 V (banked) —
Package Type 100-MBGA (Micro FBGA) —
Package Size 6 x 6 mm, 0.5 mm pitch —
安裝類型 Surface Mount Surface Mount
工作溫度 -40°C to +100°C (I5 grade) -40C to +100C (industrial grade, 'I')
Lead-Free / RoHS Lead Free, RoHS Compliant —
Programmability In-System via JTAG (IEEE 1149.1), non-volatile —
Design Software Altera Quartus II / Quartus Prime —
Device Series — EPM570
Logic Elements (LEs) — 440
Macrocells — 440
User I/O Pins — 76
Maximum Internal Frequency — 201.1 MHz
User Flash Memory (UFM) — 8 Kbits
Core Voltage (VCCINT) — 2.5 V / 3.3 V
I/O Bank Voltage (VCCIO) — 1.5 V / 1.8 V / 2.5 V / 3.3 V
封裝 — 100-ball FBGA (FineLine BGA), 1.0 mm pitch
Configuration Memory — Non-volatile Flash (instant-on)
Programming Interface — JTAG (IEEE Std. 1149.1)
RoHS 狀態 — Compliant

資料表與資源

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