EPM7128ATC144-10 vs EPM7128AETC144-10 比較
詳細並排比較 EPM7128ATC144-10 由 Altera 與 EPM7128AETC144-10 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM7128ATC144-10 | EPM7128AETC144-10 |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | NRND |
| Manufacturer | Altera (now Intel) | — |
| Series | MAX 7000A | — |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Programmable Type | EE PLD (EEPROM-based, in-system programmable) | — |
| Macrocells | 128 | 128 |
| Logic Array Blocks | 4 | — |
| User I/O Pins | 68 | — |
| Propagation Delay (tPD) | 10 ns | — |
| Maximum Counter Frequency | 98 MHz | — |
| Supply Voltage - Internal (VCCINT) | 3.0 V to 3.6 V | — |
| I/O Voltage Levels | 5.0 V / 3.3 V / 2.5 V compatible (MultiVolt I/O) | — |
| In-System Programmability | Yes (IEEE Std 1149.1 JTAG) | — |
| 工作溫度 | 0C to +70C (commercial) | 0C to +70C (Commercial) |
| 封裝 / 外殼 | 144-TQFP (20 x 20 mm) | — |
| 安裝類型 | Surface Mount | Surface Mount |
| Architecture | Multiple Array Matrix (MAX), 2nd generation | — |
| RoHS 狀態 | unknown (legacy Altera device) | [DATA_NEEDED: rohs status from manufacturer] |
| Family | — | MAX 7000A |
| Usable Gates | — | 2,500 |
| Logic Array Blocks (LABs) | — | 8 |
| Maximum User I/Os | — | 36 |
| Pin-to-pin Logic Delay (tPD) | — | 10 ns |
| Maximum Internal Counter Frequency | — | 98 MHz |
| Supply Voltage (Core) | — | 3.3 V |
| I/O Voltage Tolerance | — | 2.5 V / 3.3 V / 5 V |
| 封裝 | — | 144-pin TQFP (also referred to as LQFP-144) |
| Programming Interface | — | JTAG (IEEE Std. 1149.1) and ByteBlaster |
| Non-volatile Memory | — | EEPROM, instant-on |
| Global Clocks / Global OE | — | 2 / 2 |
| MSL 等級 | — | MSL 3 (per JEDEC J-STD-020) |