EPM7128ELC84-20 vs EPM7128ELC84-10 比較

詳細並排比較 EPM7128ELC84-20 由 Altera 與 EPM7128ELC84-10 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EPM7128ELC84-20 EPM7128ELC84-10
品牌 Altera Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete 啟用中
Series MAX 7000 —
Device Family EPM7128 (CPLD) —
Number of Macrocells 128 —
Number of Usable Gates 2500 —
Number of User I/Os 68 —
Number of Logic Array Blocks (LABs) 8 —
Propagation Delay (tPD) 20 ns —
Maximum Frequency (fCNT) 62.5 MHz —
Supply Voltage (VCC) 5 V —
Supply Voltage Tolerance 4.75 V to 5.25 V —
Technology CMOS, EEPROM-based (non-volatile) EEPROM-based CMOS
Programmable Interface IEEE Std. 1149.1 (JTAG) —
Package Type PLCC-84 (J-Lead, J-bend) —
安裝類型 Surface Mount (PLCC socket compatible) Surface Mount / Socket
工作溫度 0C to +70C (commercial) 0C to +70C (Commercial)
RoHS 狀態 Contains lead (pre-RoHS, SnPb finish) [DATA_NEEDED: RoHS status from datasheet]
Family — MAX 7000
Device Type — CPLD (Complex Programmable Logic Device)
Macrocells — 128
Equivalent Logic Gates — [DATA_NEEDED: equivalent gate count from datasheet]
User I/Os — 68
Dedicated Inputs — 12
Operating Voltage (VCCINT/VCClO) — 5 V
Pin-to-Pin Delay (tPD) — 10 ns
Counter Frequency (fCNT) — [DATA_NEEDED: fCNT from datasheet]
封裝 — 84-pin PLCC (J-Lead)
Programming Interface — IEEE 1149.1 (JTAG) ISP
In-System Programmable — Yes
Lead-Free — [DATA_NEEDED: lead-free status from datasheet]

資料表與資源

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