EPM7128SQC160-10 vs EPM7128SQC160-15 比較
詳細並排比較 EPM7128SQC160-10 由 Altera 與 EPM7128SQC160-15 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Altera
EPM7128SQC160-10 - MAX 7000 CPLD, 128 Cells, 100 I/O, 10ns | Altera
EPM7128SQC160-10 Obsolete
規格比較
| 參數 | EPM7128SQC160-10 | EPM7128SQC160-15 |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | MAX 7000 | — |
| Series | MAX 7000S | MAX 7000 |
| Macro Cells | 128 | — |
| Usable Gates | 2,500 | — |
| Logic Array Blocks (LABs) | 8 | — |
| User I/O Pins | 100 | — |
| Maximum Operating Frequency | 100 MHz | 125 MHz (internal feedback) |
| Pin-to-Pin Propagation Delay (tPD) | 10 ns | — |
| Supply Voltage (VCCINT) | 5 V | — |
| I/O Supply Voltage (VCCIO) | 3.3 V or 5 V | — |
| Configuration Memory | Non-volatile EEPROM | EEPROM (non-volatile, ~100 erase/program cycles) |
| Programming Interface | JTAG (IEEE 1149.1) / ByteBlaster | IEEE 1149.1 JTAG |
| 封裝 | 160-pin PQFP | — |
| Lead Pitch | 0.65 mm | — |
| 工作溫度 | 0C to +70C (commercial) | 0C to +70C (commercial grade) |
| 安裝類型 | Surface Mount | Surface Mount |
| Compliance | RoHS - see notes | — |
| Programmable Type | — | In-System Programmable (EEPROM) |
| Number of Macrocells | — | 128 |
| Number of Logic Elements/Blocks | — | 8 (LABs of 16 macrocells each) |
| Number of Usable Gates | — | 2,500 |
| Number of I/O | — | 100 |
| Propagation Delay (tpd) | — | 15 ns max |
| Logic Element Propagation Delay | — | 4.5 ns |
| Supply Voltage (VCC) | — | 4.75 V to 5.25 V |
| Logic Family | — | CMOS |
| 封裝 / 外殼 | — | 160-BQFP (160-PQFP, 28x28 mm) |
| RoHS 狀態 | — | [DATA_NEEDED: RoHS compliance] |
| Product Status | — | Obsolete (per distributor listings) |