EPM9320ARC208-10 vs EPM9320ARC208-10N 比較
詳細並排比較 EPM9320ARC208-10 由 Altera 與 EPM9320ARC208-10N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM9320ARC208-10 | EPM9320ARC208-10N |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 最後購買 | Obsolete |
| Device Family | MAX 9000 | — |
| Product Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 320 | — |
| Usable Gates | 6,000 | — |
| Pin-to-Pin Delay (tPD) | 10 ns | — |
| Maximum Frequency | 144.9 MHz | 144.9 MHz |
| 供應電壓 | 5.0 V | — |
| Logic Blocks (LABs) | 16 | — |
| Programmability | EEPROM, in-system programmable via JTAG | — |
| JTAG Support | IEEE Std. 1149.1 compliant | — |
| Speed/Power Optimization | Per-macrocell programmable, 50% power mode available | — |
| 封裝 | RQFP-208 (Power Quad Flat Pack) | 208-pin RQFP (BFQFP with exposed pad) |
| 安裝類型 | Surface Mount | Surface Mount |
| 工作溫度 | [DATA_NEEDED: operating temperature range] | 0C to +70C (Commercial) |
| RoHS 狀態 | [DATA_NEEDED: RoHS compliance status] | Compliant (lead-free 'N' suffix) |
| Family | — | MAX 9000 |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Macro Cells | — | 320 |
| Logic Gates | — | 6,000 gates |
| Logic Array Blocks (LABs) | — | 16 |
| Propagation Delay (tPD) | — | 10 ns |
| Supply Voltage (VCC) | — | 5 V |
| User I/O Pins | — | 168 |
| Dedicated Input Pins | — | 12 |
| Programming Interface | — | IEEE Std. 1149.1 JTAG |
| Configuration Memory | — | Non-volatile EEPROM |