EPM9560ARC240-10N vs EPM9560ARI240-10N 比較
詳細並排比較 EPM9560ARC240-10N 由 Altera 與 EPM9560ARI240-10N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Altera
EPM9560ARC240-10N - MAX 9000 CPLD 560 Macro 191 IOs | Altera/Intel
EPM9560ARC240-10N ObsoleteIntel
EPM9560ARI240-10N - MAX 9000 CPLD, 560 Macrocells, 5V, 240-RQFP | Intel
EPM9560ARI240-10N Nrnd規格比較
| 參數 | EPM9560ARC240-10N | EPM9560ARI240-10N |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | NRND |
| Logic Family | MAX 9000 (CPLD) | CMOS, EEPROM-based |
| Process Technology | CMOS EEPROM | — |
| Macro Cells | 560 | — |
| User I/Os | 191 | 216 (per digchip); 191 (per Mouser) |
| Logic Array Blocks (LABs) | 16 | 16 |
| Propagation Delay (tPD) | 10 ns | 10 ns (-10 speed grade) |
| Internal Frequency (fMAX) | 145 MHz | — |
| Supply Voltage (VCCINT) | 5.0 V | — |
| 工作溫度 | 0°C to +70°C (Commercial) | -40C to +85C (industrial) |
| 封裝 | 240-pin RQFP (32x32 mm) | 240-pin RQFP (RQFP-240 / PQFP-240) |
| 安裝類型 | Surface Mount | Surface Mount |
| Programming Interface | IEEE 1149.1 JTAG / ByteBlaster | — |
| Programmability | In-system, EEPROM-based (non-volatile) | — |
| I/O Standard | 5.0 V TTL-compatible | — |
| RoHS 狀態 | Non-RoHS (legacy Altera part) | — |
| Family | MAX 9000 | MAX 9000 |
| Product Type | — | CPLD (Complex Programmable Logic Device) |
| Usable Gates | — | 12,000 |
| Macrocells | — | 560 |
| Maximum Internal Frequency | — | 144.9 MHz (typical); 145 MHz (per digchip) |
| 供應電壓 | — | 5.0 V nominal (4.5 V min, 5.5 V max) |
| In-System Programmability | — | Yes (5.0 V ISP via JTAG) |
| Architecture | — | Multiple Array MatriX (MAX) - 3rd generation |
| JTAG (IEEE 1149.1) | — | Yes |
| Lead-Free / RoHS | — | [DATA_NEEDED: lead-free / RoHS status not in provided data] |