EPM9560GI280-15 vs EPM9560GC280-20 比較

詳細並排比較 EPM9560GI280-15 由 Intel 與 EPM9560GC280-20 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EPM9560GI280-15 EPM9560GC280-20
品牌 Intel Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 NRND Obsolete
Device Family MAX 9000 —
Architecture CMOS EEPROM, third-generation Multiple Array MatriX (MAX) —
Macrocells 560 560
Flip-Flops 772 —
User I/Os 216 —
Dedicated Inputs 12 —
Logic Elements / Gates 12,000 usable gates —
Internal Frequency (fMAX) 145 MHz —
Propagation Delay (tPD) 11.4 ns —
Clock-to-Output (tCO) 16.6 ns —
Supply Voltage (VCCINT/VCCIO) 4.5 V to 5.5 V (3.3 V or 5 V I/O) —
In-System Programmability 5.0-V ISP via JTAG —
封裝 280-pin PGA (ceramic, metal-sealed cofired) 280-pin CPGA (Ceramic Pin Grid Array)
工作溫度 -40 °C to 85 °C (industrial) [DATA_NEEDED: commercial/industrial/military grade]
Process Technology CMOS EEPROM CMOS EEPROM
RoHS 狀態 [DATA_NEEDED: RoHS status] [DATA_NEEDED: CPGA package historically contains Pb; likely non-compliant]
濕度敏感等級 (MSL) MSL-3 (168 hours) —
Family — MAX 9000
Device Type — CPLD (Complex Programmable Logic Device)
Usable Gates — 12,000
Maximum User I/O — 212
Pin-to-Pin Delay — 20 ns (speed grade -20)
Counter Frequency (max) — 100 MHz
Supply Voltage (VCCINT) — 4.75 V to 5.25 V (5.0 V nominal)
I/O Voltage — 3.3 V or 5.0 V configurable
In-System Programming — Yes, via IEEE 1149.1 JTAG
安裝類型 — Through-Hole (CPGA socket)

資料表與資源

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