EPM9560RC208-19 vs EPM9560RC208-20 比較
詳細並排比較 EPM9560RC208-19 由 Altera 與 EPM9560RC208-20 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM9560RC208-19 | EPM9560RC208-20 |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Device Family | MAX 9000 | MAX 9000 (EPM9560) |
| Product Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 560 | 560 |
| Usable Gates | 12,000 | 12,000 |
| Logic Array Blocks (LABs) | [DATA_NEEDED: LAB count] | — |
| Flip-Flops | 772 | 772 |
| User I/O Pins | 149 | 153 |
| Propagation Delay (tPD) | 19 ns | — |
| Maximum Frequency | [DATA_NEEDED: fMAX] | — |
| Supply Voltage (VCCINT) | 5.0 V | — |
| I/O Voltage Tolerance | 3.3 V / 5 V | — |
| In-System Programmability | Yes (IEEE 1149.1 JTAG) | Yes, via IEEE Std. 1149.1 JTAG |
| Technology | CMOS EEPROM | — |
| 封裝 | RQFP-208 (208-pin PQFP) | 208-pin RQFP (28x28 mm) |
| JEDEC Package Code | S-PQFP-G208 | — |
| 工作溫度 | [DATA_NEEDED: operating temperature grade] | 0C to +70C (commercial) |
| 安裝類型 | Surface Mount | Surface Mount |
| RoHS 狀態 | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Logic Array Blocks | — | 35 |
| Pin-to-Pin Delay (tPD) | — | 20 ns |
| 最大時脈頻率 | — | 100 MHz |
| 供應電壓 | — | 5.0 V |
| Configuration Technology | — | EEPROM (non-volatile) |
| I/O Standards | — | 5.0 V TTL/CMOS compatible |
| MSL 等級 | — | [DATA_NEEDED: MSL level] |