EPM9560RC208-19 vs EPM9560RC208-20 Comparison
Detailed side-by-side comparison of EPM9560RC208-19 by Altera and EPM9560RC208-20 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM9560RC208-19 | EPM9560RC208-20 |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Device Family | MAX 9000 | MAX 9000 (EPM9560) |
| Product Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 560 | 560 |
| Usable Gates | 12,000 | 12,000 |
| Logic Array Blocks (LABs) | [DATA_NEEDED: LAB count] | — |
| Flip-Flops | 772 | 772 |
| User I/O Pins | 149 | 153 |
| Propagation Delay (tPD) | 19 ns | — |
| Maximum Frequency | [DATA_NEEDED: fMAX] | — |
| Supply Voltage (VCCINT) | 5.0 V | — |
| I/O Voltage Tolerance | 3.3 V / 5 V | — |
| In-System Programmability | Yes (IEEE 1149.1 JTAG) | Yes, via IEEE Std. 1149.1 JTAG |
| Technology | CMOS EEPROM | — |
| Package | RQFP-208 (208-pin PQFP) | 208-pin RQFP (28x28 mm) |
| JEDEC Package Code | S-PQFP-G208 | — |
| Operating Temperature | [DATA_NEEDED: operating temperature grade] | 0C to +70C (commercial) |
| Mounting Type | Surface Mount | Surface Mount |
| RoHS Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Logic Array Blocks | — | 35 |
| Pin-to-Pin Delay (tPD) | — | 20 ns |
| Maximum Clock Frequency | — | 100 MHz |
| Supply Voltage | — | 5.0 V |
| Configuration Technology | — | EEPROM (non-volatile) |
| I/O Standards | — | 5.0 V TTL/CMOS compatible |
| MSL Level | — | [DATA_NEEDED: MSL level] |