EPM9560RC240-15 vs EPM9560RC240-15YY 比較
詳細並排比較 EPM9560RC240-15 由 Intel 與 EPM9560RC240-15YY 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM9560RC240-15 | EPM9560RC240-15YY |
|---|---|---|
| 品牌 | Intel | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | NRND |
| Logic Family | MAX 9000 (CMOS EEPROM-based) | — |
| Macrocells | 560 | — |
| Usable Gates | 12,000 | 12,000 |
| User I/O Pins | 191 | — |
| 封裝 | 240-pin RQFP (32x32 mm) with exposed pad | — |
| Pin-to-Pin Propagation Delay | 15 ns | — |
| Maximum Internal Frequency | 145 MHz | — |
| 供應電壓 | 5.0 V | — |
| 工作溫度 | 0 C to 70 C (commercial) | 0 C to +70 C (commercial) |
| 安裝類型 | Surface Mount | Surface Mount |
| Configuration Technology | EEPROM (non-volatile) | — |
| In-System Programmability | Yes (JTAG ISP) | — |
| Number of Terminals | 240 | — |
| Package Code | FQFP / RQFP | — |
| Terminal Form | Gull Wing | — |
| Package Shape | Square | — |
| RoHS 狀態 | [DATA_NEEDED: RoHS status] | Non-RoHS (YY suffix indicates non-compliant / matte tin or SnPb lead finish per Altera legacy convention) |
| MSL 等級 | [DATA_NEEDED: MSL level] | — |
| Family | — | MAX 9000A |
| Logic Type | — | CMOS EEPROM-based CPLD |
| Number of Macrocells | — | 560 |
| Number of User I/O | — | 191 |
| Maximum Operating Frequency | — | 117.6 MHz |
| Propagation Delay (tpd) | — | 15 ns |
| Supply Voltage (VCC) | — | 5.0 V |
| Programmability | — | In-system via IEEE 1149.1 (JTAG) |
| Package Type | — | RQFP-240 (Plastic Quad Flat Pack) |
| Speed Grade | — | -15 |
| Logic Array Blocks (LABs) | — | [DATA_NEEDED: LAB count for EPM9560] |