EPM9560RC240-15 vs EPM9560RC240-15YY Comparison
Detailed side-by-side comparison of EPM9560RC240-15 by Intel and EPM9560RC240-15YY by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM9560RC240-15 | EPM9560RC240-15YY |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | NRND |
| Logic Family | MAX 9000 (CMOS EEPROM-based) | — |
| Macrocells | 560 | — |
| Usable Gates | 12,000 | 12,000 |
| User I/O Pins | 191 | — |
| Package | 240-pin RQFP (32x32 mm) with exposed pad | — |
| Pin-to-Pin Propagation Delay | 15 ns | — |
| Maximum Internal Frequency | 145 MHz | — |
| Supply Voltage | 5.0 V | — |
| Operating Temperature | 0 C to 70 C (commercial) | 0 C to +70 C (commercial) |
| Mounting Type | Surface Mount | Surface Mount |
| Configuration Technology | EEPROM (non-volatile) | — |
| In-System Programmability | Yes (JTAG ISP) | — |
| Number of Terminals | 240 | — |
| Package Code | FQFP / RQFP | — |
| Terminal Form | Gull Wing | — |
| Package Shape | Square | — |
| RoHS Status | [DATA_NEEDED: RoHS status] | Non-RoHS (YY suffix indicates non-compliant / matte tin or SnPb lead finish per Altera legacy convention) |
| MSL Level | [DATA_NEEDED: MSL level] | — |
| Family | — | MAX 9000A |
| Logic Type | — | CMOS EEPROM-based CPLD |
| Number of Macrocells | — | 560 |
| Number of User I/O | — | 191 |
| Maximum Operating Frequency | — | 117.6 MHz |
| Propagation Delay (tpd) | — | 15 ns |
| Supply Voltage (VCC) | — | 5.0 V |
| Programmability | — | In-system via IEEE 1149.1 (JTAG) |
| Package Type | — | RQFP-240 (Plastic Quad Flat Pack) |
| Speed Grade | — | -15 |
| Logic Array Blocks (LABs) | — | [DATA_NEEDED: LAB count for EPM9560] |